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1 Microcontroller Fundamentals & Programming Addressing Modes.

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1 1 Microcontroller Fundamentals & Programming Addressing Modes

2 2 Addressing Modes define the different methods, instructions obtain data required for its execution. What are 68hc11 instructions ? Examples: LDAA #$55 LDAA $20,X LDAB $2000 BRA BEGIN Some 68HC11 instructions.

3 3  The 68HC11 has 6 addressing modes: 1. Direct 2. Extended 3. Index 4. Immediate 5. Inherent 6. Relative Types of Addressing Modes

4 4 Access data from memory $00 to $FF. Instruction makes up of 2 bytes machine code. (one byte of Op-code,one byte of Operand Address). Example: LDAA $30 ; contents of memory ($0030) ; load into ACCA Direct Addressing Mode Op-code Operand Address

5 5 Before execution After execution Example LDAA $30 ; contents of memory ($0030) ; load into ACCA. B6 $002F 55 $0030 3C $0031 B6 $002F 55 $0030 3C $0031 CPU ACCA $FF Memory CPU ACCA $55

6 6 Extended Addressing Mode Example: LDAA $8830 ; contents of memory ($8830) ; loaded into ACCA  Almost similar to Direct Addressing Mode.  Accessed data from memory ($0100) to ($FFFF).  Instruction consists 3 bytes of machine code. ( one opcode and two operands = 3 bytes ). Op-code Operand (2-bytes)

7 7 Before execution After execution B6 $882F 99 $8830 3C $8831 B6 $882F 99 $8830 3C $8831 CPU ACCA $55 Memory CPU ACCA $99 Example LDAA $8830 ; contents of memory ($8830) ; load into ACCA

8 8 Index Addressing Mode The effective memory address: = a fixed, 8-bit, unsigned offset number + contents of Index register (IX or IY). Instruction accessed memory ($0000) to ($FFFF). The offset number range from $00 to $FF. Example LDAA $31, X ; load contents of memory ($31+IX) ; into ACCA offset number Index register + = effective address

9 9 After execution Before execution Example LDAA $31,X ; if IX = $9000 then, contents of ; memory ($9031) load into ACCA. IX $9000 69 $9030 55 $9031 $9032 Memory CPU ACCA $FF IX $9000 69 $9030 55 $9031 $9032 Memory CPU ACCA $55

10 10 Immediate Addressing Mode Instruction contains immediate value to load into register. Immediate value must be preceded by “#” character. The immediate value = operand of instruction = operand data of instruction. Example: LDAA ; hex value $69 loaded into ACCA. LDY ; hex value $1234 loaded into IY. #$69 #$1234

11 11 After execution Before execution Example LDAA #$69 ; load value of $69 into ACCA Memory CPU ACCA $FF Memory CPU ACCA $69

12 12 Inherent Addressing Mode Only, opcode used and no operand required. The operation involves the CPU registers. The opcode will specify the registers involved. Example: a) TAB ;transfer contents of ACCA to ACCB. b) DEX ; IX = subtract contents of IX by one. ; IX =(IX) - $01 c) DAA ; Decimal Adjust ACCA (BCD)

13 13 Relative Addressing Mode Used by branch instructions. (BRA, BHI … ) The offset ($dd) ranges from -128 10 to +127 10. Example: BEQ $dd ; if Z flag =“0”, ; program executes the next instruction. ; if Z flag =“1”, ; program branches & executes ; instruction pointed by (PC + $dd).

14 14 AddressMachine CodeMnemonics $80004F CLRA $800127 20 BEQ$20 $8003B7 C0 00STAA$C000 - - - - - $802386 29LDAA#$29 - - - - - Example Executing BEQ $20 Relative branch to ($8023). see next page for calculation. PC

15 15 Address ($8001) contains BEQ = Current address. Address ($8023 = PC + Offset) = Destination address. The value $20 in (BEQ $20) = Offset. Example (contd) Equation: Destination = PC + Offset. Address = $8003 + $20 = $8023 (Ans.)

16 16 Addressing S/N Modes Mnemonics Comments 1.Direct LDAA $55 ; memory address ; is 1 byte 2.Extended LDAB $8050 ; memory address ; is 2 bytes 3.Index LDAA $20,X ; index register is ; part of address Summary of 6 Addressing Modes

17 17 Addressing S/N Modes Mnemonics Comments 4.Immediate LDAB #$55 ; data $55 is ; loaded into ACCB 5.Inherent RTS ; only opcode and ; no data 6.Relative BRA BEGIN; branch to label ; “BEGIN” Summary of 6 Addressing Modes

18 18 Thank You

19 19 Theory Test 1 Topic: Part 1 – PC Systems (Ch 1 to Ch 8) Part 2 – Computer Programming (Ch 1 to 7) Scope:Sect A: 10 short questions Sect B: 2 structured questions Date:30 November 2006 Time/Venue:NC0504Q – 8:00 am to 10:00 am (T03-18) NC0504P – 10:30 am to 12:30 am (LT 1)


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