1. Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 1 Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design FPGA design for an RGB YCbCr-transformation Results of Phase 1 Johann-P. Wolff, Michael Rethfeldt

2. Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 2 RGB YCbCr - transformation 3 Multiplications per color component Addition of 3 or 4 addends

3. Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 3 Design Ripple-Carry Adder (generic bit length) Easy to implement Scalable Small

4. Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 4 Design Modified Booth Multiplier (Radix-4) Reduced number of partial products Multiplier: overlapping 3bit-blocks Booth-Recoding of Multiplicand BlockPartial Product 0000 0011 * Multiplicand 0101 * Multiplicand 0112 * Multiplicand 100-2 * Multiplicand 101-1 * Multiplicand 110-1 * Multiplicand 1110

5. Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 5 Metric Area A pairs (LUT pairs)2919 Frequency f max 60.267 MHz Operation time t OP 6.8 * 10 -4 s Average error0.5192415 Metric818.8480517 s

6. Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 6 Future Optimization Addition of 3 (4) Operands in Y/Cb/Cr-Calculation CSA / 3:2-Compressor & Ripple-Carry FA A2:2A1:2A0:2A2:2A1:2A0:2A2:2A1:2A0:2 FA HAHA HAHA S0 S1

7. Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 7 Future Optimization A priori knowledge of coefficients use to reduce number of arithmetic operations Try out different adder structures