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Overview and Status of the ATLAS Pixel Detector Claudia Gemme, CERN/INFN-Genova on behalf of the ATLAS Pixel Community 10th ICATPP Conference, Como, Oct.

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Presentation on theme: "Overview and Status of the ATLAS Pixel Detector Claudia Gemme, CERN/INFN-Genova on behalf of the ATLAS Pixel Community 10th ICATPP Conference, Como, Oct."— Presentation transcript:

1 Overview and Status of the ATLAS Pixel Detector Claudia Gemme, CERN/INFN-Genova on behalf of the ATLAS Pixel Community 10th ICATPP Conference, Como, Oct 8 th 2007

2 ATLAS: A Toroidal LHC ApparatuS

3 The ATLAS Pixel Detector The Pixel Detector is the innermost part of the tracking system for the ATLAS experiment. It consists of three barrel layers and six disks, covering with three precise measurement points the region up to  =2.5. Innermost layer (B-layer) at R=5 cm. A total of 80 million channels and a sensitive area of 1.6 m 2. Modules will operate in an environment temperature below 0ºC and inside a 2T solenoidal magnetic field. Components have been tested to be rad-hard up to: NIEL > 10 15 1 MeV n/cm 2 dose > 500 kGy B-Layer Layer-1 Disks Beampipe

4 Module concept Modules are the building block of the Pixel Detector. There will be 1456 barrel modules and 288 forward modules. Each module has 46080 pixels in an area of ~10 cm 2 Module are placed on cooling/support structure (staves in the barrel, sectors for the endcaps). Modules components: Sensors are n + pixels on n substrate, 60.8mm×16.4 mm × 250  m active silicon volume. Pixel size 50  m (R  ) × 400  m (  ). Bump bonds between Si sensor and 16 front-end electronics chips (both SnPb and In bumps used). Module Controller Chip on flex hybrid to perform distribution of commands and event building Micro-cable (~1m) connected to service panel (PP0)

5 Front-End Electronics I Each FE connected to 2880 pixels FE receive commands, clock, Level-1 trigger from controller chip at 40 Mbit/s rate Charge injection circuitry allows to measure/calibrate relevant parameters. Pixel-level control logic (14-bits) to adjust e.g. Threshold and Time-over-Threshold (ToT). Each channel can be individually tuned, to get uniform response: threshold: 4000 e - threshold dispersion: 40-90 e - noise: 140-180 e -

6 Ideal pulse shape is almost triangular with fast rise and slow return to baseline. Timing of this signal is critical 1. Timewalk: low pulse height signals arrive later than high pulse height; if delay is too high, the pulse is associated to the subsequent bunch crossing. uniform efficiency requires good synchronization. 2. Time over Threshold (ToT) used to interpolate position of multi-hit clusters as a function of  =Q 2 /(Q 1 +Q 2 ) Time over Threshold for a m.i.p. tuned to 30 clock cycles timewalk ToT 20 ns In-time threshold 1 m.i.p. Front-End Electronics II

7 Service Panels and Optoboard 272 Optoboards: Data-out: 8-VCSEL array (40 to 160 Mbit/s) to off-detector electronics (RODs) Data-in: PiN diode receives commands, clock, Lv1 Service panels bring services out of inner detector volume (~7m) Active part: optoboards that provide electrical/optical data conversion

8 8 Commissioning of End-Cap (Fall 06) In fall 2006 – before final detector integration: performed a 10% system test One end-cap (144 modules) Scintillators for cosmics trigger One prototype service panel Services close to final version operation at -10 ºC, using evaporative cooling; connection to off-detector readout electronics via optical fibres Achievements: Commission services Commission DAQ and offline with cosmic and random triggers. Pixel endcap A Service quarter panel

9 9 More on Optoboards Three problems affects the optoboard’s VCSELs: Temperature dependence Low optical power at low T, but optoboards coupled to cooling Forced the use of heaters to keep the optoboards at room temperature. Common-Series-Resistance Symptom: VCSEL dying during production (aging process?) No dead VCSEL observed since Oct. 2006 Slow-Turn-On: Shown later not to affect operation after tuning of optical threshold 10C 5C -5C -10C -15C -20C -25C Optical power (uW) Channel

10 Cosmics run I Timewalk spreads hits through different “bunch crossings” The LVL1 distribution is sensitive to module timing and has been used to Check module relative synchronization with resolution better than 1 ns. Delay VS module number ns Disk 0 Disk 1 Disk 2 ns Hits in time with trigger Flat noise distributio n 10 ns

11 Cosmics run II Occupancy: hit probability per bunch crossing of a pixel. True random occupancy is order of 10 -10 Efficiency can be computed using particles which cross overlapping modules in the same disk ( 24% of tracks) Average efficiency ~99% After masking 89 (out of 1.6×10 6 ) pixels with occupancy greater than 10 -4 10 -10 Signal Noise *

12 12 Pixel Package Integration (Mar-Jun07) End-cap Beampipe Service panel Connection of cooling pipes Permanent connection of micro-cables

13 SQP integration and Connectivity Test Connectivity test to check Permanent module connection to services Last chance to repair before installation in the pit! The first time the full detector is readout using the full readout chain Connectivity test setup: Use cosmic test hardware (can only test ~10% of pixel at a time) No cooling available: possible switching on only a reduced part of the detector at a time. 1 module 2 modules on 3 modules on Hardware T interlock

14 Results of the Connectivity Test Check optical and electrical connections: LV, HV, Env sensors Micro-cables mapping Optical fiber mapping Optoboard tunability Results: Only 2 module failures: One broken HV cable LV short problem 1 PiN and 1 VCSEL single channel dead Every optoboard tunable Required DCS/DAQ development As built detector quality: Localised inefficiencies ~0.12% –2 unusable modules –3 dead FE chips –None of these in the B-layer! Individual bad pixels ~0.2% Layer 2:0.29% Layer 1:0.20% B-Layer:0.07% Disks:0.15% Most relevant failures: disconnected bumps noisy channels reduced charge collection

15 ... and then diving June 25 June 29

16 Pixel Commissioning plans Atlas combined run M5 (22 Oct – 5 Nov): Data taking with off-detector electronics, few modules and Simulated ROD events. Connection of the detector (Dec/Jan): Test/commissioning of electrical/optical/cooling connections Sign-off of the detector (Feb/March): Commissioning of the cooling system with detector powered Calibration and noise measurements Data taking Combined run with ID sub-systems for ID sign-off Cosmics run with Atlas (Mar/April)

17 Conclusions The ATLAS Pixel detector construction has been completed and the detector has been installed on June 29! Detailed information of each of the 80M channels: the fraction of defective pixels is below 0.4% One endcap has been used for system commissioning: matching of optical components proved to be critical reconstruction and simulation software validated using cosmics rays: noise occupancy O(10 -10 ) efficiency >99% resolution matches MC expectation. Unfortunately final connection to the services will not be possible until December: operation only in March. As Sleeping Beauty waiting for Prince Charming...to be awakened by a cosmics’ kiss

18 Backup

19 Common Serial Resistance (CSR) Symptom: like a dead VCSEL Some “failed” boards recovered A procedure is developed to measure the resistance of the inaccessible CSR and the worst boards are rejected.(~7% ) The reason is not understood yet Conductive epoxy thickness? Time dependent ?

20 Optical Power Ratios (H/R) Suspicious STO # of channels Optical Power Ratio (High/Random)

21 Connections at PP1 A Quadrant at PP1 Type 2 cables (connectors only) Type 1 cables Optofibers faceplate Corrugated panels (Outer/Inner)


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