1. Instructor: Evgeniy Kuksin Preformed by: Ziv Landesberg Duration: 1 semester

2.  Create a FIR filter that can process pulses from photon counting detectors and perform Peak Detection using NI Labview FPGA.

3.  The project is completed!  Final clock rate – 125MHz (due A/D)  Successfully processing 4 channel simultaneously

4. - + Photons ADC Shaper Peak Detector FPGA Readout To PC

5. FPGA(125MHz) A\D NI 5761 14 bit 125 MHz Signal generator (Preamplifier emulator)

6.  Trapezoidal can achieve optimal noise performance from signal. Trapezoidal Shaper, unlike many analog pulse shaper, immune to “ballistic deficit”, that causes energy distortion in the spectrum.  Trapezoidal shaper can not be implemented by analog circuits.

7.  The Coefficients were calculated by the method at the article of “On nuclear spectrometry pulses digital shaping and processing”, the biexponential pulse part. the method is to inverse the transfer function of the pulse(making it a digital delta), and then convolute the delta with a trapezoid. Due to the fact that both the inverse function of the pulse and the trapezoid were finite length, the resulted filter was FIR.

8. Calc invers function of pulse Delete zeroes from output Calc trapez impulse response

9.  The input signal was generated at 2 main stages :  1) create an array with Poisson distributed digital delta’s in it. It was done by the Poisson noise generator, that each event was transformed to delta, and each none event was transformed to zero.  2 ) transfer the deltas to linear rising- exponential decaying pulse, was done simply by convoluting the array with the response of such pulse(with cut- off values lower than exp(-10 ))

10. Shape of a pulse Impulse generating Convolut deltas with wanted shape

11. Impulses Wanted shape Resulted signal

12. The building of the filter in Labview was done using the fir template already existing in the program. So first stage was to create a fds file to generate filter from it. The second stage was to use the automatic filter generation

16. Distributed arithmetic does not use DSP units !

17. Input signal Shaped signal

18. Input signal Shaped signal histogram Result of shaper with ballistic defflict

24. Current Next shper (8 rise time) 6 rise time shaper

27. Std-60Mean-60 Std-120Mean-120 Std-140 Mean-140

28. Rise time: 1 6 8 std_603.51.9 mean_6060 std_1203.21.91.8 mean 120121123.5125 std_1403.71.91.8 mean_140140142.5144.5

37. channelstd_60mean_60std_120mean_120std_140mean_140 03.2603.3122.53.2142 13.2603.3122.53.2142 23.2603.3122.53.2142 33.2603.3122.53.2141 std mean

38.  The shaper which is most resistance to noise is the 16 length, with 8(sample) rise time. But apparently he is effected by quantization effect, and he caused distortion in pulses heights( probably because they have different rise time)  The 8 length shaper is nearly unaffected by quantization effect, and is the not distortive. The third filter is kind of the middle between them, with low noise and low distortion.

39.  The final system is operating at 125MHz due to the clock rate of the A/D(can only be 125MHz or 250MHz). However the “bottle neck” of the system is the FIFO to the host, so in order to increase throughput we could create the histogram of the peak detector on the FPGA himself, and send it to the host(needs slower FIFO to do it).