1. EE 5340 Semiconductor Device Theory Lecture 17 – Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc

2. ©rlc L17-24Mar20112 Summary of V a > 0 current density eqns. Ideal diode, J s expd(V a /(  V t )) –ideality factor,  Recombination, J s,rec exp(V a /(2  V t )) –appears in parallel with ideal term High-level injection, (J s *J KF ) 1/2 exp(V a /(2  V t )) –SPICE model by modulating ideal J s term V a = V ext - J*A*R s = V ext - I diode *R s

3. ©rlc L17-24Mar20113 V ext ln(J) data Effect of R s V KF Plot of typical V a > 0 current density equations

4. ©rlc L17-24Mar20114 For V a < 0 carrier recombination in DR The S-R-H rate (  no =  po =  o ) is

5. ©rlc L17-24Mar20115 Reverse bias (V a carrier gen in DR Consequently U = -n i /     = mean min. carr. g/r lifetime

6. ©rlc L17-24Mar20116 Reverse bias (V a < 0), carr gen in DR (cont.)

7. ©rlc L17-24Mar20117 E crit for reverse breakdown (M&K**) Taken from p. 198, M&K**

8. ©rlc L17-24Mar20118 Reverse bias junction breakdown Avalanche breakdown –Electric field accelerates electrons to sufficient energy to initiate multiplication of impact ionization of valence bonding electrons –field dependence shown on next slide Heavily doped narrow junction will allow tunneling - see Neamen*, p. 274 –Zener breakdown

9. ©rlc L17-24Mar20119 Reverse bias junction breakdown Assume -V a = V R >> V bi, so V bi -V a -->V R Since E max ~ 2V R /W = (2qN - V R /(  )) 1/2, and V R = BV when E max = E crit (N - is doping of lightly doped side ~ N eff ) BV =  (E crit ) 2 /(2qN - ) Remember, this is a 1-dim calculation

10. ©rlc L17-24Mar201110 Junction curvature effect on breakdown The field due to a sphere, R, with charge, Q is E r = Q/(4  r 2 ) for (r > R) V(R) = Q/(4  R), (V at the surface) So, for constant potential, V, the field, E r (R) = V/R (E field at surface increases for smaller spheres) Note: corners of a jctn of depth x j are like 1/8 spheres of radius ~ x j

11. ©rlc L17-24Mar201111 BV for reverse breakdown (M&K**) Taken from Figure 4.13, p. 198, M&K** Breakdown voltage of a one-sided, plan, silicon step junction showing the effect of junction curvature. 4,5

12. ©rlc L17-24Mar201112 Diode equivalent circuit (small sig) IDID VDVD VQVQ IQIQ  is the practical “ideality factor”

13. ©rlc L17-24Mar201113 Small-signal eq circuit C diff C depl r diff C diff and C depl are both charged by V a = V Q VaVa

14. ©rlc L17-24Mar201114 Diode Switching Consider the charging and discharging of a Pn diode –(N a > N d ) –W n << Lp –For t < 0, apply the Thevenin pair V F and R F, so that in steady state I F = (V F - V a )/R F, V F >> V a, so current source –For t > 0, apply V R and R R I R = (V R + V a )/R R, V R >> V a, so current source

15. ©rlc L17-24Mar201115 Diode switching (cont.) + + VFVF VRVR D R RFRF Sw R: t > 0 F: t < 0 V F,V R >> V a

16. ©rlc L17-24Mar201116 Diode charge for t < 0 xnxn x nc x pnpn p no

17. ©rlc L17-24Mar201117 Diode charge for t >>> 0 (long times) xnxn x nc x pnpn p no

18. ©rlc L17-24Mar201118 Equation summary

19. ©rlc L17-24Mar201119 Snapshot for t barely > 0 xnxn x nc x pnpn p no Total charge removed, Q dis =I R t

20. ©rlc L17-24Mar201120 I(t) for diode switching IDID t IFIF -I R tsts t s +t rr - 0.1 I R

21. ©rlc L17-24Mar201121

22. ©rlc L17-24Mar201122

23. ©rlc L17-24Mar201123 Ideal diode equation for E gN = E gN J s = J s,p + J s,n = hole curr + ele curr J s,p = qn i 2 D p coth(W n /L p )/(N d L p ), [cath.] = qn i 2 D p /(N d W n ), W n > L p, “long” J s,n = qn i 2 D n coth(W p /L n )/(N a L n ), [anode] = qn i 2 D n /(N a W p ), W p > L n, “long” J s,n >N d, W n & W p cnr wdth

24. ©rlc L17-24Mar201124 Ideal diode equation for heterojunction J s = J s,p + J s,n = hole curr + ele curr J s,p = qn iN 2 D p /[N d L p tanh(W N /L p )], [cath.] = qn iN 2 D p /[N d W N ], W N > L p, “long” J s,n = qn iP 2 D n /[N a L n tanh(W P /L n )], [anode] = qn iP 2 D n /(N a W p ), W p > L n, “long” J s,p /J s,n ~ n iN 2 /n iP 2 ~ exp[[E gP -E gN ]/kT]

25. ©rlc L17-24Mar201125 Bipolar junction transistor (BJT) The BJT is a “Si sandwich” Pn  (P=p +,  =p - ) or Np  (N=n +, =n - ) BJT action: npn Forward Active when V BE > 0 and V BC < 0 P n  EBC V EB V CB Charge neutral Region Depletion Region

26. ©rlc L17-24Mar201126 npn BJT topology Charge Neutral Region Depletion Region x x’ p-Base -CollectorN-Emitter z 0 WBWB W B +W C -W E 0 x” c x” 0 xBxB 0 x’ E IEIE ICIC IBIB

27. ©rlc L17-24Mar201127 BJT boundary and injection cond (npn)

28. ©rlc L17-24Mar201128 BJT boundary and injection cond (npn)

29. ©rlc L17-24Mar201129 IC npn BJT (* Fig 9.2a)

30. ©rlc L17-24Mar201130 References * Semiconductor Physics and Devices, 2nd ed., by Neamen, Irwin, Boston, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, John Wiley, New York, 1986.

31. ©rlc L17-24Mar201131 References * Semiconductor Physics and Devices, 2nd ed., by Neamen, Irwin, Boston, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, John Wiley, New York, 1986.