1. 1 Assembler A short Overview

2. 2 Content Language Levels High Level  micro code Machinecode language Assembler languages Structure Commands

3. 3 Language Levels High Level Language Assembler Language Machine Language Micro - programming Hardware „Firmware“ Normally deepest free accessible Level

4. 4 High Level  Micro Code High Level language Formulating program for certain application areas Hardware independent Assembler languages Machine oriented language Programs orient on special hardware properties More comfortable than machine code (e.g. by using symbolic notations)

5. 5 High Level  Micro Code Machine code: Set of commands directly executable via CPU Commands in numeric code Lowest semantic level Generally 2 executing oportunities: Interpretiv via micro code Directly processing via hardware

6. 6 High Level  Micro Code Micro programming: Implementing of executing of machine commands (Control unit - controller) Machine command executed/shown as sequence of micro code commands Micro code commands: Simpliest process controlling Moving of data Opening of grids Tests

7. 7 Machinecode language Machinecode command: Binary word (fix length, causes elementary operations within CPU) Machinecode program sequence of machinecode commands

8. 8 Machinecode language Structure: Operationcode Defining executable operation Operandaddress Spezification of operands Constants/register addresses/storage addresses Difference between 1/2/3 address machines OpCodeOpAddress

9. 9 Machinecode language Data transport commands Arithmetic and logical commands Process controlling commands In-/output commands Special commands Disadvantage: Difficultly readable No symbolic names(Mnemomics)

10. 10 Assembler languages Translated into machinecode language(Interpreter) Each operation code(opcode) owns one symbolic command Assignments of operand addresses are possible Labels for command addresses

11. 11 Assembler languages Usage of pseudo commands Commands for assembler Assigment of values/addresses(variables) Definition of the programstart addresses Allocating of memory for variables

12. 12 Assembler languages-structure Label symbolic labeling of an assembler address (command address at Machine level) Mnemomic Symbolic description of an operation Operands Contains of variables or addresse if necessary Comments Comments

13. 13 Assembler Languages - Machine Instructions Bitpatterns are created, executed as commands by CPU Classes: Arithmetic/logical Operations(ADD,SUB,XOR, administrative commands - EQU, shifting&rotation commands) Data transfer(load/save operations, speicher<>register, register<>register) Control commands(jump op. [un-]conditional /relativ,control op. – STOP) In-/output commands

14. 14 Assembler – Assembler Instructiuons (Pseudo Commands) Instructions to assembler Controlling translation process No creation of machine code Affect creation of machine instructions Types : Program organisation equations and symbolic Addresses Definition of Constants and Memory Addressing

15. 15 Arithmetic example: Source and Destination Data width has to euqal AX, BX, CX, DX, SI, DI, BP, SP ; arithmetic operations ADD AX, BX ; AX := AX+BX SUB AH,AL ; AH := AH - AL MOV AL, CL; AL := CL INC CX; CX := CX+1 DEC CL; CL := CL-1 NEG CX; CX := -CX Assembler – All purpose Register AHAL BHBL CLCH CX BX AX All purpose Register

16. 16 Assembler – Special Register Unless to all-purpose registers Special register(SS, DS, CS, ES, IP) Never ever are Destination/Source of a „mov“ command Destination of arithmetic operations

17. 17 Assembler – Flag Register Overflow Direction Interrupt enable Trap Sign Zero Auxiliary carry Parity Carry ODITSZAPC

18. 18 Assembler – Flag Register FLAG-Bits: C Carry Area crossing of unsigned numbers A Aux. CarryArea crossing at BCD-design O Overflow Area crossing at arithmetic operation with signed numbers S SignTrue if result = negativ Z ZeroResult = Null P ParityResult has an even number of 1 Bits D Direction flagDefines direction of string- commands IInterruptGlobal Interrupt Enable/Disable Flag T Trap FlagUsed by debugger, allows single-step- modus

19. 19 Assembler – Flag Register Missing flags: V: Two’s complement overflow indicator H: Half Carry Flag Operations and flags ADD, SUB, NEGaffects O, S, Z, A, P, C INC, DEC -“- O, S, Z, A, P MUL, DIV -“- O, C AND, OR, XOR -“- S, Z, P, C

20. 20 Assembler – Jump Operations Un-/conditioned jumps Example: Mov AX, 0 CMP CX, 0 again: JZ end (jumpzero, conditioned j.) ADD AX, CX DEC CX JMP again (unconditioned jumped) end: NOP

21. 21 Sources http://www.informatik.ku-eichstaett.de /studium/skripte/ws0203/einf2/Vorlesung12.ppt http://www-ist.massey.ac.nz /GMoretti/159704/Lectures/1-Languages-Translation-&-Assemblers.pdf http://www.mathematik.uni-marburg.de /~priebe/lehre/ws0001/ti1/Skript/TechInf1Lo08.ppt E:\temp\4.Semester\Intro into Dig.Computing\Doku\Befehlssatz.pdf

22. 22 Thanks 4 ur Attention Any further questions ??