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Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh.

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Presentation on theme: "Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh."— Presentation transcript:

1 Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh

2 Princess Sumaya Univ. Computer Engineering Dept. Chapter 2:

3 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 2 / 12 Intel Processors History YearMicroprocessorAddress BitsData BitsTransistors , , /829, /8134, /16/8275, /16/81,200, Pentium3232/16/83,100, Pentium Pro3232/16/85,500, Pentium II3232/16/87,500, Pentium III3232/16/89,500, Pentium 43232/16/842,000, Pentium 4 EM64T6432/16/8125,000, Core 2 Quad6432/16/8820,000,000

4 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 3 / 12 Microprocessor Architecture Address Data Register File ALU Microprocessor MEMORYMEMORYMEMORYMEMORY

5 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 4 / 12 Modes of Operation  Real-Address Mode ●20-Bit Address (1 MB Memory) ●8/16-Bit Data ●8/16-Bit Registers  Protected Mode  Virtual Mode  System Management Mode

6 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 5 / 12 Real Mode Registers AL  8 Bits  AH  8 Bits  AX BLBH BX CLCH CX DLDH DX Accumulator Register Base Register Count Register Division Register

7 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 6 / 12 Real Mode Registers  16 Bits  SI Source Index DI Destination Index BP Base Pointer SP Stack Pointer IP Instruction Pointer

8 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 7 / 12 Real Mode Registers  16 Bits  CS Code Segment DS Data Segment ES Extra Segment SS Stack Segment

9 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 8 / 12 Real Mode Memory Segmentation  Previous Microprocessors ●8-bit Data, 16-bit Address ●  64 KByte Memory Space  Code Segment  Data Segment  Overlapping Byte ↓ 0 F F F F 1 M 64 K ↓ 1 F F F F 64 K

10 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 9 / 12 Real Mode Addressing Segment Register Offset Bits + Memory Address  64 KB Segmentation ●16-Byte Boundary Alignment ●Seg:Offset Notation Example:

11 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 10 / 12 Flags  Status Flags ●Carry (CF) ●Overflow (OF) ●Sign (SF) ●Zero (ZF) ●Auxiliary Carry (AC) ●Parity (PF)  Control Flags ●Direction, Interrupt, etc OF DF IF TF SF ZF - AC - PF - CF

12 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 11 / 12 Intel 8086/8088 IP ALAH BLBH CLCH DLDH SI DI BP SP CS DS ES SS ALU Operations: ADD SUB MUL DIV INC DEC AND OR 

13 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. 12 / 12 x86 Assembly Language  Instruction Format ●Mnemonic ●One or More Operands  Machine Code  Assembly Statement ●Label ●Instruction ●Comment Mnemonic Operands Mnemonic Operands Opcode Mode Operands Opcode Mode Operands

14 Princess Sumaya University – Computer Org. & Assembly Lang. Computer Engineering Dept. Chapter 2


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