1. MICROCONTROLLER SYSTEMS Part 1

2. Figure 1.1Elements of a digital controller CPU Central Processing Unit Input Peripherals Output Peripherals ROM Read Only Memory RAM Read & Write Memory Program download User input User output The microcontroller contains all these elements in one chip

3. Figure 1.2 16F877 pin-out The microcontroller pins have multiple functions

4. Figure 1.3PIC 16F877 MCU Block diagram Shows the main parts of the chip in simplified form Flash ROM Program Memory 8192 x 14 bits 0000 – 1FFF Instruction Register MCU control lines Program Counter (13 bits) Stack 13 bits x 8 levels RAM File Registers 368 X 8 bits 000-1FF Data Bus (8 bits) File Select Register Working (W) Register File Address Literal Op- code Instructions Address Arithmetic & Logic Unit Ports, Timers ADC, Serial I/O Status bits Timing control EEPROM 256 bytes ClockReset Port A B C D E Program address Instruction Decode & CPU control Status (Flag) Register

5. Table 1.1PIC16F877 simplified file register map Bank 0 (000 – 07F)Bank 1 (080 – 0FF)Bank 2 (100-180)Bank 3(180-1FF) AddressRegisterAddressRegisterAddressRegisterAddressRegister 000hIndirect080hIndirect100hIndirect180hIndirect 001hTimer0081hOption101hTimer0181hOption 002hPC Low082hPC Low102hPC Low182hPC Low 003hStatus Reg083hStatus Reg103hStatus Reg183hStatus Reg 004hFile Select084hFile Select104hFile Select184hFile Select 005hPort A data085hPortA direction105h-185h- 006hPort B data086hPortB direction106hPort B data186hPortB direction 007hPort C data087hPortC direction107h-187h- 008hPort D data088hPortD direction108h-188h- 009hPort E data089hPortE direction109h-189h- 00AhPC High08AhPC High10AhPC High18AhPC High 00BhInterrupt Control08BhInterrupt Control10BhInterrupt Control18BhInterrupt Control 00Ch to 01Fh 20 Peripheral Control Registers 08Ch to 09Fh 20 Peripheral Control Registers 10Ch to 10Fh 4 Peripheral Control Registers 18Ch to 18Fh 4 Peripheral Control Registers 110h to 16Fh 96 General Purpose Registers 190h to 1EFh 96 General Purpose Registers 020h to 06Fh 80 General Purpose Registers 0A0h to 0EFh 80 General Purpose Registers 070h to 07Fh 16 Common Access GPRs 0F0h to 0FFh Accesses 70h – 7Fh 170h to 17Fh Accesses 70h – 7Fh 1F0h to 1FFh Accesses 70h – 7Fh

6. Table 1.2PIC microcontroller types MCU Pins Data word (bits) Program memory (bytes) Typical Instruction Set Speed MIPS Comment 10FXXX = 68<= 512 33 x 12 bits <= 2 Low pin count, small form factor, cheap No EEPROM, none low power, assembler program 12FXXX = 88<= 2 KB12 / 14 bits<= 5 Low pin count, small form factor, cheap EEPROM, 10-bit ADC, some low power, assembler 16FXXX <= 648<= 14 KB 35 x 14 bits <= 5 Mid-range, UART, I2C, SPI many low power, C or assembler program 18FXXXX <= 100 8<= 128 KB 75 x 16 bits <= 16High range, CAN, USB J series 3V supply, C program 24FXXXX <= 100 16<= 128 KB 76 x 24 bits = 16 Power range, 3V supply, no EEPROM, data RAM < 8 KB, C program

7. Figure 1.4I/O pin operation The pin can be set for input or output data transfer CPU Data Bus Output Current Driver Output Data Latch Data Direction Latch Tri-state Output Enable Input Data Latch Write data bit Read data bit Write TRIS bit Analogue input multiplexer

8. Figure 1.5General Timer Operation A binary counter is used as a timer when driven from the clock Binary Counter Pre- scaler (clock divide) Post-scaler (output divide) Timer Overflow/ Timeout (Interrupt) Flag Clock Source Select Instruction Clock External Pulse Capture register Compare register Capture signal Match flag

9. Figure 1.6ADC operation The ADC converts an analog input into a binary code ANx Analogue to Digital Converter Vref+ Input volts 0-Vf Reference volts, Vf 8-bit or 16-bit integer result Setup ADC Read ADC

10. Figure 1.7Comparator operation Vc+ Vc- Compartor status bit Vc+ > Vc- The comparator simply sets a bit if one input is higher than the other

11. Figure 1.8Parallel Slave Port operation The PSP allows an external data bus to be connected to the MCU Parallel Slave Port Chip select Read Write EXTERNAL Data x 8 Interrupt INTERNAL Data x 8

12. Table 1.3Interrupts sources in the PIC 16F877 Interrupt SourceInterrupt trigger eventCCS C Interrupt label TIMERS Timer 0Timer 0 register overflowINT_TIMER0 Timer 1Timer 1 register overflowINT_TIMER1 CCP 1Timer 1 capture or compare detectedINT_CCP1 Timer 2Timer 2 register overflowINT_TIMER2 CCP2Timer 2 capture or compare detectedINT_CCP2 PORTS RB0/INT pinChange on single pin RB0INT_EXT Port B pinsChange on any of four pins RB4 – RB7INT_RB Parallel Slave PortData received at PSP (write input active)INT_PSP Analog ConverterA/D conversion completedINT_AD Analog ComparatorVoltage compare trueINT_COMP SERIAL UART Serial PortReceived data availableINT_RDA UART Serial PortTransmit data buffer emptyINT_TBE SPI Serial PortData transfer completed (read or write)INT_SSP I2C Serial PortInterface activity detectedINT_SSP I2C Serial PortBus collision detectedINT_BUSCOL MEMORY EEPROMNon-volatile data memory write completeINT_EEPROM

13. Program Execution 1 Start counter statement 2 Run Counter until overflow 5 Time-out Process (Interrupt Service Routine) 7 Continue 3 Timeout Interrupt 6 Return from Interrupt 4 Jump to ISR Figure 1.9Timer Interrupt Process Time-out forces the program to be suspended and the ISR executed

14. PIC MCU TX1 Transmit RX1 Receive Ground HOST PC RX2 TX2 COM PORT Ground Line Driver Interface Figure 1.10USART RS232 Signal Line drivers convert the signal to a bipolar, higher voltage +/- 12V

15. Figure 1.11Typical USART RS232 signal Bit 2 Bit 3 IdleStart Bit 0 Bit 1 Bit 4 Bit 5 Bit 6 Bit 7 Stop Bit Time 1010 Bit period The data bits are timed from the falling edge of the start bit

16. Master Serial Data Out, SDO Serial Data In, SDI Serial Clock, SCK Slave Select SS1 Outputs SS2 SS3 Slave 1 SDO SDI SCK !SS Slave 2 SDO SDI SCK !SS Figure 1.12SPI Connections SPI uses hardware slave selection and separate clock

17. Figure 1.13SPI Signals 7 6 5 4 3 2 1 0 Data bitsSDO/SDI SCKClock Each data bit is transferred on the falling edge of the clock

18. MasterSlave1Slave2 +5V SDA SCL etc Figure 1.14I 2 C Connections Slave selection uses addresses issued by the Master

19. 7 6 5 4 3 2 1 0 SDA SCL Acknowledge Address / Data bits Start Figure 1.15I 2 C Signals Data is strobed in using the master clock, and reception is acknowledged by the slave by taking the data line low

20. Listing 1.1A simple C program /* OUTBYTE.C MPB 2-1-07 V1.0 */ #include "16F877A.h"// MCU select void main()// Main block { output_D(255);// Switch on outputs } This minimal program outputs a binary code to Port D

21. Listing 1.2Program hex file :1000000000308A0004280000840183131F30830518 :1000100083161F149F141F159F1107309C00880121 :08002000FF3083128800630029 :02400E00733FFE :00000001FF ;PIC16F877A The machine code is downloaded as a binary file to the chip

22. Figure 1.16Screenshot of MPLAB Project The C program is compiled and tested in simulation mode

23. Figure 1.17ICSP target board connections Application Board MCU Vpp/!MCLR Vdd Vss PGD PGC 1234512345 ICSP Interface Reset 10k Vdd Vss Board +5V Supply Connections to the target chip for programming