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Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number.

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Presentation on theme: "Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number."— Presentation transcript:

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2 Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s.

3 Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. 0011 1101 0101 0010 0000 0000 0000 0000 0011 1101 0101 0010

4 Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s.

5 Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s. 1100 1110 1010 1110 1111 1111 1111 1111 1100 1110 1010 1110

6 Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s. Or, put 16 bits in the right most 16 bits and fill with the sign bit. This is called sign extension.

7 Division – Positive numbers Divisor 0010 00000111 Dividend Quotient

8 Division – Positive numbers Divisor 0010 00000111 Dividend or Remainder 1110 1110 < 0 Change Quotient bit to 0 and restore This must be true or the quotient would exceed 4 bits, so start with shift Trial 1 Quotient

9 Division – Positive numbers Divisor 0010 00000111 Dividend or Remainder 1110 1110 < 0 Change Quotient bit to 0 and restore, then shift and try again Trial 1 Quotient

10 Division – Positive numbers Divisor 0010 00000111 Dividend or Remainder 1110 1111 < 0 Change Quotient bit to 0 and restore, then shift and try again Trial 01 Quotient

11 Division – Positive numbers Divisor 0010 00000111 Dividend or Remainder 1110 0001 > 0 shift and use new remainder Trial 001 Quotient

12 Division – Positive numbers Divisor 0010 00000111 Dividend or Remainder 1110 00011 New Remainder Trial 001 Quotient

13 Division – Positive numbers Divisor 0010 00000111 Dividend or Remainder 1110 00011 1110 0001 Remainder Trial 0011 Quotient

14 4 bit ALU 0010 00000111 Control Test Divisor Remainder Shift R / L Initialize with Dividend 0111 Same basic hardware as Multiply 0010 00000111

15 4 bit ALU 0010 00000111 Control Test Divisor Remainder Shift R / L 1. Shift Remainder left Dividend 0111 0010 00000111

16 4 bit ALU 0010 00001110 Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 2’s complement 1110 Dividend 0111 0010 00000111 1110

17 4 bit ALU 0010 11101110 Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 3.< 0, add Divisor 1110 Dividend 0111 0010 00000111 1110 0010

18 4 bit ALU 0010 00001110 Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 3.< 0, add Divisor 4.Shift left, Set 0 1110 Dividend 0111 0010 00000111 1110 0010 0000

19 4 bit ALU 0010 00011100 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 1110 Dividend 0111 0 0010 00000111 1110

20 4 bit ALU 0010 11111100 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2. < 0, add Divisor 1110 Dividend 0111 0 0010 00000111 1110 1111 0010

21 4 bit ALU 0010 00011100 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2. < 0, add Divisor 3.Shift, Set 0 1110 Dividend 0111 0 0010 00000111 1110 1111 0010 0001

22 4 bit ALU 0010 00111000 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 1110 Dividend 0111 00 0010 00000111 1110

23 4 bit ALU 0010 00011000 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2.>0, shift left, set 1 1110 Dividend 0111 00 0010 00000111 1110 0001

24 4 bit ALU 0010 00110001 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 1110 Dividend 0111 001 0010 00000111 1110 00011 1110

25 4 bit ALU 0010 00010001 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2.>0, Shift left, set 1 1110 Dividend 0111 001 0010 00000111 1110 00011 1110 0001

26 4 bit ALU 0010 00100011 Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2.>0, Shift left, set 1 3.Shift left half right 1110 Dividend 0111 0011 0010 00000111 1110 00011 1110 00010

27 4 bit ALU 0010 00010011 Control Test Divisor Remainder Shift R / L Quotient = 0011 Remainder = 0001 1110 Dividend 0111 0011 0010 00000111 1110 00011 1110 0001

28 Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor

29 Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d

30 Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d If r – d < 0, Qi = 0, shift r-d and add Divisor

31 Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d If r – d < 0, Qi = 0, shift r-d and add Divisor Algorithm for Non- restoring Division 1.Subtract Divisor from Remainder 2.If r-d > = 0, Qi = 1, shift and subtract divisor 3.If r-d < 0, Qi =0, shift and add divisor 4. After n bits, if Remainder is negative, restore

32 Non –Restoring Division 1.Shift Remainder Register left 1 bit 2.Subtract the Divisor Register from the left half of the Remainder Register Test Remainder >= 0 < 0 3a. Shift Remainder left and set bit 0 to 1 3b. Shift Remainder left and set bit 0 to 0 n Repetitions ? Yes No Yes n Repetitions ? No 4a. Subtract Divisor from left half of Remainder Register 4b. Add Divisor to left half of Remainder Register 5a. Shift left half of Reminder right one bit 5b. Shift left half of Remainder right one bit and add Divisor to left half of Remainder

33 4 bit ALU 0010 00000111 Control Test Divisor Remainder Shift R / L Initialize with Dividend 0111 Non –Restoring Division 0010 00000111

34 4 bit ALU 0010 00000111 Control Test Divisor Remainder Shift R / L 1. Shift Remainder left Dividend 0111 0010 00000111

35 4 bit ALU 0010 00001110 Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 2’s complement 1110 Dividend 0111 0010 00000111 1110

36 4 bit ALU 0010 11101110 Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 3.< 0, Shift left, Set 0 1110 Dividend 0111 0010 00000111 1110 2’s complement

37 4 bit ALU 0010 11011110 Control Test Divisor Remainder Shift R / L 1.Add divisor 1110 Dividend 0111 0 0010 00000111 1110 11101 2’s Complement

38 4 bit ALU 0010 11011110 Control Test Divisor Remainder Shift R / L 1.Add divisor 1110 Dividend 0111 0 0010 00000111 1110 11101 0010 2’s Complement

39 4 bit ALU 0010 11111110 Control Test Divisor Remainder Shift R / L 1.Add divisor 2.< 0, Shift left, set 0 1110 Dividend 0111 0 0010 00000111 1110 11101 0010 1111 2’s Complement

40 4 bit ALU 0010 11111100 Control Test Divisor Remainder Shift R / L 1.Add divisor 1110 Dividend 0111 00 0010 00000111 1110 11101 0010 11111 0010 2’s Complement

41 4 bit ALU 0010 00011100 Control Test Divisor Remainder Shift R / L 1.Add divisor 2.> 0, Shift left, set 1 1110 Dividend 0111 00 0010 00000111 1110 11101 0010 11111 0010 0001 2’s Complement

42 4 bit ALU 0010 00111001 Control Test Divisor Remainder Shift R / L 1.Subtract divisor 1110 Dividend 0111 001 0010 00000111 1110 11101 0010 11111 0010 00011 1110 2’s Complement

43 4 bit ALU 0010 00011001 Control Test Divisor Remainder Shift R / L 1.Subtract divisor 2.>0, Shift left, set 1 1110 Dividend 0111 001 0010 00000111 1110 11101 0010 11111 0010 00011 1110 0001 2’s Complement

44 4 bit ALU 0010 00110011 Control Test Divisor Remainder Shift R / L 1.Subtract divisor 2.>0, Shift left, set 1 3.Shift Left Half right 1110 Dividend 0111 0011 0010 00000111 1110 11101 0010 11111 0010 00011 1110 0001 2’s Complement

45 4 bit ALU 0010 00010011 Control Test Divisor Remainder Shift R / L 1.Subtract divisor 2.>0, Shift left, set 1 3.Shift Left Half right 1110 Dividend 0111 0011 0010 00000111 1110 11101 0010 11111 0010 00011 1110 0001 2’s Complement

46 MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder divide div$s1, $s2# Lo = $s1/$s2 = quotient # Hi = $s1 mod$s2 = remainder For signed numbers, 1. determine the sign of the quotient 2. convert to positive representation 3. divide 4. determine the sign and convert to 2’s complement if needed

47 MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder divide div$s1, $s2# Lo = $s1/$s2 = quotient # Hi = $s1 mod$s2 = remainder divide unsigned divu$s1, $s2 # unsigned version of div

48 MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder multiply mult$s1, $s2# Hi,Lo = $s1 x $s2 multiply unsigned multu$s1, $s2# Hi,Lo = $s1 x $s2 ( unsigned) move from Hi mfhi$s3# $s3 = Hi move from Lo mflo$s3# $s3 = Lo

49 Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill

50 Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill For 2’s Complement Numbers It does not always work!

51 Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill For 2’s Complement Numbers It does not always work! Ex: -5 = -0101, 2’s Complement = 1011 Divide by 4 by shift right 2, fill with ?

52 Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill For 2’s Complement Numbers It does not always work! Ex: -5 = -0101, 2’s Complement = 1011 Divide by 4 by shift right 2, fill with ? 1110 is 0001+1=0010 = 2 WRONG!

53 Floating Point Numbers Normalized Mantissa or Significand and Exponent Add 0.713 x 10 -2 and 0.964 x 10 -1

54 Floating Point Numbers Normalized Mantissa or Significand and Exponent Add 0.713 x 10 -2 and 0.964 x 10 -1 1.Align the exponents by shifting the smaller 0.0713 x 10 -1 0.9640 x 10 -1

55 Floating Point Numbers Normalized Mantissa or Significand and Exponent Add 0.713 x 10 -2 and 0.964 x 10 -1 1.Align the exponents by shifting the smaller 0.0713 x 10 -1 0.9640 x 10 -1 2. Add 1.0353 x 10 -1

56 Floating Point Numbers Add 0.713 x 10 -2 and 0.964 x 10 -1 1.Align the exponents by shifting the smaller 0.0713 x 10 -1 0.9640 x 10 -1 2. Add 1.0353 x 10 -1 3. Normalize0.10353 x 10 0

57 Floating Point Numbers Add 0.713 x 10 -2 and 0.964 x 10 -1 1.Align the exponents by shifting the smaller 0.0713 x 10 -1 0.9640 x 10 -1 2. Add 1.0353 x 10 -1 3. Normalize0.10353 x 10 0 4. Round off 0.104 x 10 0

58 Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee

59 Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee Leading 1 Binary Point Significand = 1.yyyyyyyyy Exponent(signed) Arithmetic

60 Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee Leading 1 Binary Point Significand = 1.yyyyyyyyy Exponent(signed) Arithmetic

61 Floating Point Numbers Add 1.0101 x 2 3 and 1.1011 x 2 1

62 Floating Point Numbers Add 1.0101 x 2 3 and 1.1011 x 2 1 1.Align the exponents by shifting the smaller 1.0101 x 2 3 0.011011 x 2 3

63 Floating Point Numbers Add 1.0101 x 2 3 and 1.1011 x 2 1 1.Align the exponents by shifting the smaller 1.0101 x 2 3 0.011011 x 2 3 2. Add 1.101111 x 2 3

64 Floating Point Numbers Add 1.0101 x 2 3 and 1.1011 x 2 1 1.Align the exponents by shifting the smaller 1.0101 x 2 3 0.011011 x 2 3 2. Add 1.101111 x 2 3 3. Normalize – Check for Overflow and Underflow 1.101111 x 2 3

65 Round - Off 4.563 significant digits +.0357 4.5957

66 Round - Off 4.563 significant digits +.0357 4.5957 4.60 Rounded Off

67 Round - Off 4.563 significant digits +.0357 4.5957 4.60 Rounded Off What if 4.5950 ?

68 Round - Off 4.563 significant digits +.0357 4.5957 4.60 Rounded Off What if 4.5950 ? 4.60 Round to even

69 Round - Off BinaryDecimal.00.01.25.10.50.11.75

70 Round - Off BinaryDecimal.00.01.25.10.50 Are there any trailing 1’s ? If not, round to even.11.75

71 Floating Point Numbers Add 1.0101 x 2 3 and 1.1011 x 2 1 1.Align the exponents by shifting the smaller 1.0101 x 2 3 0.011011 x 2 3 2. Add 1.101111 x 2 3 3. Normalize – Check for Overflow and Underflow 1.101111 x 2 3 4. Round to 4 bits Guard bit = 1 and Round bit = 1

72 Floating Point Numbers Add 1.0101 x 2 3 and 1.1011 x 2 1 1.Align the exponents by shifting the smaller 1.0101 x 2 3 0.011011 x 2 3 2. Add 1.101111 x 2 3 3. Normalize – Check for Overflow and Underflow 1.101111 x 2 3 4. Round to 4 bits Guard bit = 1 and Round bit = 1 1.1100 x 2 3

73 IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1 bit E (8 bits) F (23 bits)

74 IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1 bit E (8 bits) F (23 bits) Bias Exponent E>0

75 IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1 bit E (8 bits) F (23 bits) Only Zero is F = 0 and E = 0 Simplifies data exchange Compare using integer processes Accuracy and round-off & Overflow and Underflow

76 IEEE 754 Floating Point Standard 1 10000010 01010000000000000000000 =.25+.0625 =.3125

77 IEEE 754 Floating Point Standard 1 10000010 01010000000000000000000 =.25+.0625 =.3125 E = 2 7 + 2 = 128 + 2 = 130

78 IEEE 754 Floating Point Standard 1 10000010 01010000000000000000000 =.25+.0625 =.3125 E = 2 7 + 2 = 128 + 2 = 130 Number = (-1) S x ( 1 + F) x 2 E-127

79 IEEE 754 Floating Point Standard 1 10000010 01010000000000000000000 =.25+.0625 =.3125 E = 2 7 + 2 = 128 + 2 = 130 Number = (-1) S x ( 1 + F) x 2 E-127 = – ( 1 +.3125) x 2 130 – 127

80 IEEE 754 Floating Point Standard 1 10000010 01010000000000000000000 =.25+.0625 =.3125 E = 2 7 + 2 = 128 + 2 = 130 Number = (-1) S x ( 1 + F) x 2 E-127 = – ( 1 +.3125) x 2 130 – 127 = – 1.3125 x 2 3 = – 1.3125 x 8 = – 10.5

81 IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format

82 IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = 101.0 x 2 0 = 1.01 x 2 2

83 IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = 101.0 x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits)

84 IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = 101.0 x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits) E –127 = 2 E = 2 + 127 = 129 = 1000 0001

85 IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = 101.0 x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits) E –127 = 2 E = 2 + 127 = 129 = 1000 0001 1 +F = 1.01000...

86 IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = 101.0 x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits) 1 1000 0001 0100 0000.... 0000 E = 2 + 127 = 129 = 1000 0001 1 +F = 1.01000...

87 IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee Double Precision IEEE 754 (-1) S x ( 1 + F) x 2 E-1023 s exponent+1023 significand - 1 1 bit E (11 bits) F (20 bits) significand – 1 (continued) F (32 bits)


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