1. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 1 US CMS TriDAS US CMS Meeting Wesley H. Smith, U. Wisconsin CMS Trigger Project Manager May 10, 2002 Outline: Calorimeter Trigger Status & Plans Muon Trigger Status & Plans DAQ Status & Plans (from Vivian O’Dell) This talk is available on: http://hep.wisc.edu/wsmith/cms/TriDAS_USCMS_0502.pdf

2. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 2 L1 Trigger Hardware Overview US CMS Trigger (this talk) US CMS

3. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 3 Calorimeter Trig.Overview

4. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 4 Front Rear VME Slots DC-DC Conv Cal. Trig 2nd Gen. Prototypes (U. Wisconsin) New High-Speed Backplane 160 MHz with 0.4 Tbit/sec dataflow Designed to incorporate algorithm changes New Non-Isolated Electron, Tau & Jet Triggers New Clock & Control Card Fans out 160 MHz clock & adjusts phases for all boards 50% tested successfully Clock delay adjust DC-DC Converters

5. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 5 8 Compact Mezzanine Cards for each Receiver Card accept 4 x 20 m 1.2-Gbaud copper pairs transmitting 2 cal. tower energies every 25 ns with low cost & power. Uses new Vitesse Link Chips (7216-01). New Serial Link Test Card Status: under test New Cal. Trig. 4 Gbaud Copper Link Cards & Tester (U. Wisconsin)

6. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 6 New Calorimeter Trigger Receiver Card (U. Wisconsin) Top side with 1 of 8 mezzanine cards & 2 of 3 Adder ASICs DC-DC Adder mezz link cards BSCAN ASICs PHASE ASICs MLUs Bottom side with all Phase & Boundary Scan ASICs Full featured final prototype board is in test - initial results are good. Continue to test on-board ASICs & copper link mezzanine cards

7. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 7 Cal. Trig. New Electron Isolation & Jet/Summary Cards (Wisconsin) Full featured final E.I. Proto. board is finished & ready for testing. E.I. Proto will test Electron Isolation ASICs & Sort ASICs JSC Proto. ready to build pending tests of other boards EISO SORT ASICs EISO

8. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 8 Cal Trigger Status/Plans Preparing second generation prototype tests Crate, Backplane, Clock & Control, ASICs done Receiver Card & Electron Isolation Card ready. Serial Link Mezzanine Card Receiver done, Tester Card at vendor, Transmitter Tester in design Goals for 2002 Complete of prototype tests, validate ASICs Integrate Serial Links w/ECAL,HCAL front-ends Prototype Jet/Summary card manufacture Ready for manufacture -- waiting for other board tests Finalize Jet Cluster crate design

9. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 9 Strip FE cards Wire FE cards Muon Port Card (Rice) MPC Sector Receiver/ Processor (U. Florida) OPTICAL SR/SP SP CSC Muon Sorter (Rice) Global  Trigger DTRPC FE Global L1 2  / chamber 3  / port card 3  / sector 44 44 44 44 LCT Trigger Motherboard (UCLA) Wire LCT card In counting house TMB LCT RPC Interface Module RIM On-Chamber Trigger Primitives 3-D Track-Finding and Measurement Combination of all 3 Muon Systems CSC Muon Trigger Scheme

10. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 10 1st Muon Trigger Prototypes (Florida, Rice, UCLA) Successful CSC Trigger Integration test Prototype Muon Port Card, Sector Receiver, Sector Processor, Clock Board, Backplane work & communicate -- Result in 2000 ORCA full simulation working Agreement/use with hardware test

11. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 11 1st Track-Finder Crate Tests Sector Processor (Florida) Sector Receiver (UCLA) Clock Control Board (Rice) Bit3 VME Interface CustomBackplane(Florida) Muon Port Card (Rice) 100m optical fibers Very successful but latency too high -- New design in 2001 Prototype crate for original six crate design

12. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 12 Single Track-Finder Crate Design with 1.6 Gbit/s optical links Reduces processing time from 525 ns (old design) to 175 ns Total Latency ~ 20 Bx (from input of SR/SP card to output of MS card) Crate Power Consumption ~ 500 W 15 Optical connections per SR/SP card Custom Backplane for SR/SP  CCB and MS connection New EMU Trigger Design: U. Florida Track-Finder SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP CCB BIT3 Controller SR/SP Card (3 Sector Receivers + Sector Processor) (60  sector) Clock and Control Board Muon Sorter To Global Trigger From Trigger Timing & Control From MPC (chamber 4) From MPC (chamber 3) From MPC (chamber 2) From MPC (chamber 1B) From MPC (chamber 1A) To DAQ MS

13. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 13 VME J1 CONNECTOR CUSTOM PERIPHERAL BACKPLANE 9U * 400 MM BOARD OPTICAL TRANSCEIVERS SERIALIZERS CCB INTERFACE SORTER LOGIC INPUT AND OUTPUT FIFO VME INTERFACE 3 OPTICAL CABLES TO SECTOR PROCESSOR TMB_1 TMB_2 TMB_3 TMB_4 TMB_5 TMB_6 TMB_7 TMB_8 TMB_9 SER OPTO GTLP TRANSCEIVERS FPGA New Muon Port Card Design & Optical Link Tests (Rice) New MPC Design uses new high speed links (TLK2501) to send one muon per optical fiber (needed for new compact track-finder design) Optical Link Radiation Tests: Three serializers: up to 270 kRad TID. No permanent damage or SEU Two Finisar optical modules: No errors up to 70 kRad. Failed at 70kRad (well above ~10 kRad TID inner CSC dose for 10 years)

14. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 14 CSC Trigger Status/Plans Prototype 1 tests now complete Prototype 2 and production follow EMU components to optimize technology MPC, SP, CCC modules, backplane* milestones: Apr-02 Prototype 2 designs done Freeze CSC-DT interface Determine DDU compatibility with OSU module for EMU Nov-02 Prototype 2 construction done Apr-03 Prototype 2 testing done Sep-03 Final designs done Oct-04 Production done Apr-05 Installation done (*backplane schedule ~3 months ahead of above dates to provide platform for testing and integration) Muon Sorter module: only 1, design by Jan-04

15. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 15 Schedule: Trigger Project Completion Installation in Underground Counting Room Expect access by March ‘05 Sufficient time for installation and some testing but not for completing commissioning with detectors Slice Test (on surface) With both HCAL and EMU Verify trigger functions and interfaces by testing with detectors on surface at CERN. Suggest as substitute for commissioning completion step. Will check as much on surface before gaining access to underground facilities. Planned for October ‘04 - March ‘05 Underground Counting Room

16. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 16 Original Trigger L2 Task Schedule & Updates Tasksoriginal startfinish new Produce TDR8/0012/004 Design Final Prototypes11/0012/014 Construct Final Prototypes6/016/02  11/02 Test/Integrate Final Prototypes12/0112/02  4/03 Pre-Production Design & Test6/026/03  11/03 Production12/026/04 Production Test6/0311/04 Trigger System Tests5/045/05 "Slice Test" NEW10/043/05 Trigger Installation3/059/05 Integration & Test w/DAQ & FE6/0512/05 Maintenance & Operations10/04------- 6 months civil engineering delay of installation date

17. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 17 DAQ System Overview Computing Services 16 Million channels ChargeTimePattern 40 MHz COLLISION RATE 75 kHz 1 MB EVENT DATA 1 Terabit/s READOUT 50,000 data channels 200 GB buffers ~ 400 Readout memories 3 Gigacell buffers 500 Gigabit/s 5 TeraFlps ~ 400 CPU farms Gigabit/s SERVICE LAN Petabyte ARCHIVE EnergyTracks 100 Hz FILTERED EVENT EVENT BUILDER. A large switching network (400+400 ports) with total throughput ~ 400Gbit/s forms the interconnection between the sources (deep buffers) and the destinations (buffers before farm CPUs). EVENT FILTER. A set of high performance commercial processors organized into many farms convenient for on-line and off-line applications. SWITCH NETWORK LEVEL-1 TRIGGER DETECTOR CHANNELS Original design: L-1 @ 100 kHz Rescope: 1997: 75kHz 2001: Initial L-1 @ 50 kHz But design all elements to be able to do 100 kHz

18. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 18 New DAQ design: principle Basic principle: Break DAQ into a number of functionally identical, parallel, smaller DAQ systems A 64x64 system is feasible today

19. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 19 Detector readout to surface

20. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 20 D2S + RB + EF breakdown Readout Builder Event Filter Data to Surface

21. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 21 US: Event Manager + Builder Units DAQ: US contribution (old) Builder Networks Event Manager Detector Front-end Computing Services Readout Systems Builder and Filter Systems Level 1 Trigger Run Control BU FU CERN: Inputs(500) + Switch US: Outputs + EVM Other responsibilities: Detector Front-Ends: detector groups Computing Services: infrastructure US Filter Units not included in “outputs”

22. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 22 US contribution: new Cover one segment (1/8) of the CMS DAQ plus ¼ of the Data-to-Surface system (plus the associated prototypes – “preseries”) Segment: 1 Readout Builder + 1 Event Filter US_CMS detector electronics is ~1/4 of the total Delivery of the system can be accomplished by the end of the US_CMS project (FY05) Aids the experiment most in the current phase where cash flow is very tight US R&D program can remain ~ unchanged (to the extent that the basic modules are the same) Roughly speaking, the US (a) works on/delivers prototype system (to 2004) (b) delivers the “startup DAQ” for CMS (2005)

23. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 23 Milestones*Milestones* Prototype DAQ (US Contribution) D2S Prototype July, 2004 “Slice Test”November, 2004 (*) Readout Builder PrototypeApril, 2005 Startup DAQ (US Contribution) Filter Farm ReadyMay, 2006 Readout Builder ReadyAugust, 2006 Declaration of Completion (US Contribution) Startup DAQ ready for beamSeptember, 2006 (*) “Slice” Test for US-CMS detectors – DAQ will have full D2S proto + a few RB elements *(Version 33)

24. W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: TriDAS 24 Slice Test DAQ (10-100 Hz) Trigger systemGTP, TTC and sTTS Detector readoutComplete FED crate systems (FED-TTC-TTS, Controller CPU+DSN) Readout Units XDAQ RU-VME-tasks running in all the FED controllers Data to SurfaceNone just the FED-VME bus of FED crates RCN, BCN, BDN networksDAQ Service Network (DSN e.g. GEthernet) Event managerXDAQ EVM-task running in the GTP controller Builder/Filter UnitsXDAQ BU-task running in any DSN(WAN) CPU PerformancesFew 10 Hz (up to 100s when using GE switches in DSN as EVB)