1. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR IC Fabrication n Basic fabrication steps. n Transistor structures. n VLSI Characteristics –Basic transistor behavior. »Transconductances( 超傳導 ) –Latch up.

2. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR VLSI Technology n VLSI Photolithography –Mask patterns are put on wafer using photo- sensitive material n IC built on silicon substrate( 基質 ) –some structures diffused into substrate; – other structures built on top of substrate

3. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Fabrication processes n Step 1: –Substrate regions are doped with n-type and p-type impurities. – (n+ = heavily doped) n Step 2: –Wires made of polycrystalline silicon ( 多矽晶體 ) (poly) n Step 3: –Multiple layers of aluminum/copper (metal). n Step4: –Silicon dioxide (SiO 2 ) is insulator( 絕緣體 ).

4. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process step 1 First place tubs to provide properly-doped substrate for n-type, p-type transistors: p-tubn-tub substrate

5. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process step 2-1 Pattern polysilicon before diffusion regions: p-tubn-tub poly gate oxide

6. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process steps 2-2 Add diffusions, performing self-masking: p-tubn-tub poly n+ p+

7. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process steps 3 Start adding metal layers: p-tubn-tub poly n+ p+ metal 1 vias

8. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process steps 4 n Polish SiO 2 before adding metal 2: p-tub poly n+ p+ metal 1 vias metal 2

9. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Cross Section of Simple IC substrate n+ p+ substrate metal1 poly SiO 2 metal2 metal3 transistor via

10. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Transistor structure n-type transistor:

11. FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Transistor layout n-type (tubs may vary): w L