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Current TPC electronics P. Colas Krakow, IFJ-PAN, ILD Pre-meeting September 18, 2014.

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Presentation on theme: "Current TPC electronics P. Colas Krakow, IFJ-PAN, ILD Pre-meeting September 18, 2014."— Presentation transcript:

1 Current TPC electronics P. Colas Krakow, IFJ-PAN, ILD Pre-meeting September 18, 2014

2 Orsay May 10, 2011, TPC electronics discussion GDsP CERN, starting July 2011 (converged to CFE) Krakow, IFJ-PAN, ILD Pre-meeting, Sept 24, 2013 ECFA-Pannel Detector review, DESY, Nov. 4, 2013 LC-TPC collaboration meeting, DESY, June 2014 – Decision to start a group of electronic experts (physicists and designers) to follow the evolution of technologies and guide the preparation of a ‘list of requirements’ 18/09/2014P. Colas, Current TPC electronics2

3 Past TPCs and electronics for beam tests ALEPH and DELPHI. Discrete amplifiers (1 channel each), FADCs 12 MHz Used for prototype tests (KEK 2005-2006) Carleton amplifiers. 200 MHz sampling STAR electronics : full wave sampling at 10-40 MHz by SCA, 10 bit ADC (out of 12 bits available) Then used AFTER (for Micromegas) and ALTRO (for GEMs) – AFTER Evolved to GET and AGET – ALTRO Evolved to SALTRO 18/09/2014P. Colas, Current TPC electronics3

4 Electronics for LP: AFTER and SALTRO-16 The road to the electronics for ILD. ReadoutPad Size ElectronicsGroups MPGDs Micromegas (Resistive anode) (~ 3 × 7 mm 2 Pad) AFTERSaclay-Carleton Double GEMs (Laser-etched) (~ 1 × 6 mm 2 Pad) ALTRO Asia Triple GEMs (wet- etched) Desy Micromegas (test with 7 modules) GEM (test with 3 modules) 18/09/2014P. Colas, Current TPC electronics4

5 News and progress report from prototype electronics AFTER-based (ASIC For TPC Electronic Readout). Designed at Saclay for T2K. Adapted in 2011-2012 to the Large Prototype. 72 channel Amplifier-shaper, full wave sampling by Switched Capacitor Aray, large versatility (1-100 MHz, 100-2000 ns peaking time, 120 to 600 pC full scale, 12 bit ADC). ALTRO-based (ALice TPC Read Out). SALTRO: evolution from Alice readout, 16 channel Amplifier-shaper 60- 200 ns peaking time, 25 MHz and 40 MHz sampling, Digital filtering, memory buffering. 18/09/2014P. Colas, Current TPC electronics5

6 AFTER integration to fully cover the endplate of LP-TPC (2012-2013) P. Colas, Current TPC electronics The integration has been carried out so that the new electronics is flat behind the modules, and fits in 25 X° and 5 cm, with comfortable margins. It requires 3 connections only: 1 optical fibre, 1 LV and 1 HV. Remaining refinements are going on (for March 2014): -More robust connections -2P CO2 cooling D. Attié, D. Calvet, P. Colas, E. Delagnes, A. Le Coguie, M. Riallot et al. 18/09/2014

7 14 cm 25 cm Front-End Card (FEC) 12.5 cm 2.8 cm Integrated electronics  Remove packaging and protection diodes  Wire-bond AFTER chips  Use two 300 -point connectors 0.78 cm 0.74 cm 3.5 cm AFTER Chip The resistive foil protects against sparks 4.5 cm P. Colas, Current TPC electronics 18/09/2014

8 Material budget of a module M (g) Radiation Length (g/cm 2 ) Module frame + Back-frame + Radiator (× 6 ) Al 71424.01 Detector + FEC PCB (× 6 ) + FEM Si 71221.82 12 ‘ 300 -point’ connectors Carbon 3042.70 screws for FEC + Stud screws+ Fe 29413.84 Air cooling brass 1212.73 Plexiglas 12840.54 Average of a module 189021.38 Low material budget requirement for ILD-TPC: ‐Endplates: ~ 25 % X 0 (X 0 : radiation length in cm) P. Colas, Current TPC electronics Front-End Card (FEC) Pads PCB + Micromegas Front-End Mezzanine (FEM) Cooling system ‘ 300 -point’ connectors 18/09/2014

9 AGET (ASIC for General Electronics for TPC) Four ASICs are soldered on the AsAd (ASIC Support & Analog-Digital conversion) card with four 12-bit ADC (one per AGET). The digital outputs of the 4 ADCs are transmitted by 8 differential lines with a maximum speed of 1.2 Gbit/s to the CoBo board. The CoBo (Concentration Board) board is responsible for applying a time stamp, zero suppression and compression algorithms to the data. It will also serve as a communication intermediary between the AsAd and the outside world. The slow control signals and commands to the AsAd will be transmitted via the CoBo (four AsAd per CoBo). Much faster (2 kHz DAQ rate instead of 50 Hz) 18/09/2014P. Colas, Current TPC electronics

10 18/09/2014P. Colas, Current TPC electronics10

11 S-ALTRO 16 Developments Chip and carrier board Test Socket and Test Socket Board MCM board (multichip module) and its prototype The CPLD chip Ancillaries: LV board,… DAQ with SRU (Scalable readout unit from RD51) V. Hedberg, L. Jönsson, B. Lundberg, U. Mjörnmark, A. Oskarsson, L. Österman 18/09/2014P. Colas, Current TPC electronics11

12 18/09/2014P. Colas, Current TPC electronics12

13 MCMs on a pad board 18/09/2014P. Colas, Current TPC electronics13

14 Carrier board Arrived in Lund on 19/9/2013 Fully cabled and ready for testing end October For the final electronics, dies could be either wire bonded to the MCM or mounted by chip-flip tech. 18/09/2014P. Colas, Current TPC electronics14

15 18/09/2014P. Colas, Current TPC electronics15

16 The Low Voltage board 18/09/2014P. Colas, Current TPC electronics16

17 Future electronics GdSP (Paul Aspell et al.), joint R&D with other applications. Common Front End : part of a multi-user wafer to test several options, within AIDA. 18/09/2014P. Colas, Current TPC electronics17

18 Developments in progress S-ALTRO IBM 130nm 128 ch 32 ch SAMPA TSMC 130nm ALICE TPC ALICE muons Continuous readout No power pulsing GdSP IBM 130nm VFAT3 CMS SP1 CMS Fundry Q4 2014 Use Q3 2015 SP2 2018 LCTPC ALICE GdSP Design 2016 Fundry 2024 Use 2026 18/09/2014P. Colas, Current TPC electronics18

19 18/09/2014P. Colas, Current TPC electronics19

20 The CFE project (Paul Aspell et al.) …but ALICE electronics is being made in Brazil… Fabrice Guilloux 18/09/2014P. Colas, Current TPC electronics20

21 Future electronics Need to refine the specifications: packing (number of channels per unit surface), number of bits for the ADC, frequency, noise, shaping time, etc… Simulation required to justify the specifications Need to have in LC-TPC a team including specialists to monitor the electronics R&D Define the technology (130 nm? 95 nm?...) at the time of final design and vendor selection. Detailed design depends on the technology and is prone to become obsolete if choices are done too early. The feasability of the project is demonstrated (though 1mm pads are still challenging). 18/09/2014P. Colas, Current TPC electronics21

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