2. Beam Secondary Shower Acquisition System: QIE10 Front-End, Remote Initialization BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 2 Jose Luis Sirvent Blasco PhD. Student STUDENT MEETING 11/05/2015

3. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 3 2. QIE10 Testing Preparations: 2.3 New Set-Up for linearity Studies Back-End System Front-End System Sub-Femtoamp Current Source (Keithley 6430) 3 x LHC Clock TunnelSurface SMF 9/125um UART (COM) IEEE 488 (*GPIB-USB-HS) * GPIB : General-Purpose Instrumentation Bus

4. Performing Linear – Logarithmic Current Sweeps: Unified Set-Up for ICECAL & QIE10 GPIB interface allows control of other instrumentation (Function Generator): Compatibility with future tests (TDC, Synchronous pulses response) Testing Control managed by “Console application”: Set-up instrumentation configuration Optical Link supervisor with feedback for user (me) Back-End management (Trigger readings and collects data from LPDDR memory) Test Procedure (Console App): 1. Set-Up Link 2. Set-up Instrumentation 3. Current Selection 4. Trigger Storage on Back-End (1000 points) 5. Read Data from LPDDR  PC 6. Store measurement on New CSV file Final Sweep Value? BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 4 2. QIE10 Testing Preparations: 2.4 What is it for? Test Procedure (Matlab Script): 1. Open CSV file 2. Calculate ADC mean & std. deviation 3. Store values 4. All files processed? 5. Calculate QIE10 nominal ADC 6. Plot measured Data 7. Plot QIE10 nominal ADC values

5. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 5 3.Complete Sweep QIE10-CH2 All with Series Resistor 1.3k & Parall. Cond 3uF (From last week…) Strange Behaviour Correlated with TDC Activation?!

6. 4.QIE10 Serial Register Programing 4.1 Datasheet Information BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 6 Characteristics for configuration: For correct operation with DC Current source we need to tune some internal parameters. QIE10 Configuration: 64 bits Shift register Done remotelly from Back-End. Dedicated E-Ports for Control lines and LVDS level translators used.

7. 4.QIE10 Serial Register Programming 4.2 Simulator VS Reality BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 7

8. 8 4.QIE10 Serial Register Programming 4.3 How it is done We have complete control over the different possible configurations via Console Application. Configuration Register 64 bits collected and sent trough UART to Back-End system. SRCK, SRIN and SRLOAD signals sent trough GBT Link. Dedicated E-Link on Front-End connected to Level translators and QIE10 control lines. Outcome  Complete configuration performed remotely from surface.

9. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 9 4.QIE10 Serial Register Programming 4.4 Complete Sweep in Normal Mode (I Source Keithley K6430)

10. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 10 4.QIE10 Serial Register Programming 4.4Complete Sweep in Calibration Mode (I Source Keithley K6430)

11. 5.QIE10 First analysis (CH1) 4.5 Studying Linearity and Deviation BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 11

12. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 12 5.QIE10 First analysis (CH2) 4.5 Studying Linearity and Deviation

13. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 13 6.QIE10 First analysis (CH1) 6.1Studying Sensitivity in each Sub-Range

14. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 14 6.QIE10 First analysis (CH2) 6.1Studying Sensitivity in each Sub-Range

15. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 15 Obtained by measurement QIE10 Mezzanine Board Sensitivity CH1Sensitivity CH2 3.1 fC/bin3.2 fC/bin 6.4 fC/bin6.5 fC/bin 12.9 fC/bin13.0 fC/bin 23.3 fC/bin25.6 fC/bin 24.6 fC/bin24.5 fC/bin 52.0 fC/bin51.5 fC/bin 103.2 fC/bin102.1 fC/bin 179.5 fC/bin194.6 fC/bin 194.9 fC/bin 403.5 fC/bin407.6 fC/bin 818.7 fC/bin820.1 fC/bin 1449.4 fC/bin1508.9 fC/bin 1598.5 fC/bin1543.1 fC/bin 3241.4 fC/bin3274.3 fC/bin 6537.0 fC/bin6457.3 fC/bin 12.6 pC/bin12.5 pC/bin There is a nice agreement with nominal sensitivity 6.QIE10 First analysis (Sum-Up) 6.1Studying Sensitivity in each Sub-Range

16. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 16 7. Analog Front-End Installation 7.1 Placing the pCVD diamond detector near a BWS SLAC Collimator 51738 Location: BA5 near MDVW51732 Purpose: Collect secondaries from BWSD51731 pCVD Diamond detector tests for BWS Cables Used: HV  3501876A Power +12V  3501873A Power -12V  3501872A HG signal (CK50)  3501868A LG signal (CK50)  3501867A

18. BE-BI-BL Jose Luis Sirvent Blasco (jsirvent@cern.ch) 18 Current -1000nA (-25fC)  24uA (600fC) Points 100 Steps : 250nA R-> 400k (Vdrop k6430 = 10v) Pr= 225uw Current 20uA (500fC)  220uA (5500fC) Points 100 Steps : 2uA R-> 50k (Vdrop k6430 = 10v) Pr= 2mw Current 180uA (4500fC)  1.76mA (44pC) Points 100 Steps : 15.8uA R -> 5K4 (Vdrop k6430 = 10v) Pr= 18mw Current 1.48mA (37pC)  14mA (350pC) Points 100 Steps : 125.2uA R -> 678 (Vdrop k6430 = 10v) Pr = 0.14w