1. IMIC DISCUSSION Bob Ross Interconnectix Business Unit Mentor Graphics Corporation IBIS Summit Meeting, San Diego, CA December 7, 1998

2. IBIS Status Update l JEDEC/IBIS Meeting »New Requirements& Needs »IMIC (I/O Interface Model for Integrated Circuits) l IBIS Version 3.2 »Delay, Expected January 15, 1998 Ratification Vote »BIRD57 (for Bus Hold/Active Termination Extension) –Consideration on December 18, 1998 –ibischk3.2 parser change l DesignCon99 IBIS Summit February 1, 1999 »Accuracy Issues, Future Features, Booth

3. Why Consider IMIC? l Started 1996 to Enhance IBIS Version 2.1 by EIAJ I/O Project Modeling Group l Targeted to Future Needs, Protect Process, Expand to New Device Architectures l Mixture of IBIS and SPICE l IBIS/EIAJ Meetings/Presentations 2/97, 6/97, 1/98, 6/98, 10/98 l London IEC Meeting - Why IBIS & IMIC? l POSSIBLE SOLUTIONS TO IBIS LIMITATIONS

4. Brief IMIC Overview l EIAJ Slides From Older Presentations (separate package) »Standard: http://tsc.eiaj.or.jp/tsc/SSC/iopg.htm l EIAJ Overview »Level 1: Signal Integrity »Level 2: Power Integrity »Level 3: Future EMI l Scope »Module (IBIS EBD) »IC (IBIS Component & Models) »Package (IBIS Package)

5. Brief IMIC Overview Cont’d l Missing Information for Digital Simulators »Model Type (must derive from other information) »Specs for Thresholds, Overshoots, Timing, etc. »Some Connection Information (explicit differential pins, ground/power relations, etc.) l IMIC: IBIS, SPICE & Table SPICE »Buffer Models - Table SPICE Construction »Package/Module Models SPICE &.SUBCKT Calls »IBIS Style Shell »SPICE PWL Stimulus »TYP, SLOW, FAST Packages, Buffers, Stimulus

6. IBIS/IMIC Options l Merge »Complicates Well Accepted IBIS »Unacceptable Sacrifices in IBIS of IMIC »Actual Dual Support by EDA Vendors l Link »Leverage IBIS Specification & Acceptance & IMIC Package, Buffer Details »IBIS “Submodel” & Package Extension? l Be Independent »Translator Path: IMIC to IBIS

7. Linkage Discussions l Package Model Linkage »IMIC Spice - Provides Format Convention –Supports FAST, SLOW, TYP Packages »Standard Spice l Table Spice For Buffers »Buffers by Construction for New Features –May Be Proprietary –May Be Complicated - Behavioral Approach in IBIS Extensions May Still Be Adequate »Single Complete Model by Construction & Scaling »Accuracy Details

8. Discussion l Study Group Participants »Stephen Peters, Raj Raghuram, Norio Matsui, Bob Ross »Others Welcome l Issues »Complexity »Support (IC & EDA Vendors) »Simulation Speed »Accuracy »Logistics »Incompatibilities?