1. Computer Architecture and the Fetch-Execute Cycle
The Fetch-Decode-Execute-Reset Cycle

2. Learning Objectives
Describe in simple terms the fetch / decode / execute / reset cycle and the effects of the stages of the cycle on specific registers.

3. The Fetch-Decode-Execute-Reset Cycle
The following is an algorithm in diagrammatic form that shows the steps in the cycle.
It is the control unit which controls and synchronises this cycle.
Loads / copies / places / passes, decodes and executes.
At the end the cycle is reset and the algorithm repeated.

4. Key for following slides:
PC / SQR
Program Counter / Sequence Control Register
MAR
Memory Address Register
MDR / MBR
Memory Data Register / Memory Buffer Register
CIR
Current Instruction Register

5. CPU Memory PC MAR MDR CIR Fetch PC incremented by 1
Copy of instruction in memory address held in MAR PC
Copy of address of next instruction
MAR
MDR
Instruction
CIR

6. CPU PC MAR MDR CIR Decode
Split instruction into operation code & address if present. Then decode operation code.

7. CPU Execute instructionPC
MAR
Execute instruction
(What is involved in this depends on the instruction being executed - demonstrated on the following slides).
MDR
CIR

8. Click an instruction or move on to see each instruction in turn.
Jump
Input / Load (number directly)
Input / Load (from memory)
Store
Add (a number directly)
Add (a number from memory)
Output (directly from accumulator)
Output (from memory)

9. Jump instruction
Execute Diagram

10. Copy of address part instruction
Execute
CPU
Jump PC
MAR
MDR
Copy of address part instruction
(address to jump to).
CIR

11. Copy of address part instruction
Execute
CPU
Jump
Copy of address part instruction
(address to jump to). PC
MAR
MDR
CIR
Back to list of instructions

12. Input / Load (number directly) into accumulator instruction
Execute Diagram

13. CPU PC MAR MDR Accumulator CIR Execute
Input / Load (number directly) into accumulator
CPU PC
MAR
MDR
Copy of number in MDR.
Accumulator
Number inputted / to be loaded.
CIR
Back to list of instructions

14. Reason for the CIR & MDR
As you can see the MDR is used to store the number inputted / to be loaded during the execution of this Input / Load instruction.
Therefore, if there was no CIR register to hold the Input / Load instruction and as no register can hold more than one “thing” at a time the control unit would “lose” the Input / Load instruction.
i.e. It would no longer “know” what it was supposed to do.
You will find that the contents of the MDR may be modified for similar reasons during other later instructions.
Back to list of instructions

15. Load (from memory) instruction
Execute Diagram

16. CPU Memory PC MAR MDR Accumulator CIR Execute Load (from memory)
Copy of data in address held in MAR PC
MAR
MDR
Address part of instruction
(of data to be loaded).
Copy of data in MDR
Accumulator
CIR
Back to list of instructions

17. Reason for the PC & MAR
As you can see the MAR is now used to store the address part of instruction during the execution of this Load (from memory) instruction.
Therefore if there was no MAR register the PC would be used to hold this address so the control unit would no longer know the correct address of the next instruction.
You will find that the contents of the MAR may be modified for similar reasons during other later instructions.
Back to list of instructions

18. Store instruction Execute Diagram
Assume data has either been inputted, loaded (directly or from memory) or a calculation has been performed.
Any of the above will mean there is data in the accumulator and it is this data that will be stored.

19. CPU Memory PC MAR MDR Accumulator CIR Execute Store
Copy of data in MDR stored in memory address held in MAR PC
MAR
Address part of instruction
(to store in).
MDR
Copy of data in accumulator
Accumulator
CIR
Back to list of instructions

20. Add (a number directly) instruction
Execute Diagram
Assume a number has already been inputted or loaded (directly or from memory) into the accumulator.

21. CPU ALU PC MAR MDR Accumulator CIR Execute Add (a number directly)
Add number in MDR to number already in accumulator.
ALU
Number to be added.
Accumulator
CIR
NB. The ALU now does the arithmetic.
Accumulator value is now the result of the addition.
i.e. Accumulator = Accumulator + contents of MDR
Back to list of instructions

22. Add (a number from memory) instruction
Execute Diagram
(Assume a number has already been inputted or loaded into the accumulator.)

23. CPU Memory ALU PC MAR MDR Accumulator CIR Execute Add (from memory)
Copy of number in memory address held in MAR PC
MAR
MDR
Address part of instruction
(of number to add).
Add number in MDR to number already in accumulator.
ALU
Accumulator
CIR
NB. The ALU now does the arithmetic.
Accumulator value is now the result of the addition.
i.e. Accumulator = Accumulator + contents of MDR
Back to list of instructions

24. Output (directly from accumulator) instruction
Execute Diagram

25. Output data in accumulator
Execute
Output (directly from accumulator)
CPU PC
MAR
MDR
Output data in accumulator
Accumulator
CIR
Back to list of instructions

26. Output (from memory) instruction
Execute Diagram

27. CPU Memory MAR PC MDR Accumulator CIR Execute Output (from memory)
Copy of data in memory address held in MAR
MAR PC
MDR
Address part of instruction
(of data to output).
Output data in accumulator
Copy of data in memory address held in MAR
Accumulator
CIR
Back to list of instructions

28. Cycle is reset (restarted) by passing control back to the PC.
CPU PC
Cycle is reset (restarted) by passing control back to the PC.

29. Fetch – Decode - Execute – Reset Cycle in writing
The following slides describe the cycle in writing.

30. Load the address of next instruction in the PC into the MAR.
So that the control unit can fetch the instruction from the right part of the memory.
Copy the instruction/data that is in the memory address given by the MAR into the MDR.
MDR is used whenever anything is to go from the CPU to main memory, or vice versa.
Increment the PC by 1.
So that it contains the address of the next instruction, assuming that the instructions are in consecutive locations.
Load the instruction/data that is now in the MDR into the CIR.
Thus the next instruction is copied from memory -> MDR -> CIR.
Contents of CIR split into operation code and address if present e.g. store, add or jump instructions.
Decode the instruction that is in the CIR.
Fetch
Decode

31. If the instruction is a jump instruction then
Execute the instruction but what is involved in this depends on the instruction being executed (there are several different instructions you need to know about).
If the instruction is a jump instruction then
Load the address part of the instruction in the CIR into the PC.
If the instruction is an input / load (directly) instruction then take data input and place in accumulator.
If the instruction is a load (from memory) instruction.
Copy address part of the instruction (to load from) in the CIR into MAR.
Copy data from memory address held in MAR to MDR.
Copy data in MDR into accumulator.
Execute

32. If the instruction is a store instruction then:
Copy address part of the instruction (to store in) in the CIR into MAR.
Copy data in accumulator to MDR.
Copy data in MDR into memory address held in MAR.
If the instruction is an add instruction then:
Copy address part of the instruction (of number to add) in the CIR into MAR.
Copy number from memory address held in MAR into MDR.
Add number in MDR to number in accumulator (accumulator will now hold the result).
If the instruction is an output (directly from accumulator) then output number in accumulator.
Execute

33. If the instruction is an output (from memory) instruction then:
Copy address part of part of the instruction (of data to output) in CIR into MAR.
Output contents of MDR.
Cycle is reset (restarted) by passing control back to the PC (step 1).
Execute
Reset

34. Plenary Contents of PC loaded into MAR PC is incremented
Contents of address stored in MAR loaded into MDR
Contents of MDR loaded into CIR
Instruction in CIR is decoded.
PC (program counter) stores the address of the next instruction to be executed.
MAR (memory address register) holds the address in memory that is currently being used
MDR (memory data register) holds the data (or instruction) that is being stored in the address accessed by the MAR.
CIR (current instruction register) holds the instruction which is currently being executed.