1. POLITECNICO DI MILANO Reconfiguration 4 Reliability design methodology for reliability assessment and enhancement of FPGA-based systems Dynamic Reconfigurability in Embedded Systems Design Reconfiguration 4 Reliability Team r4r@dresd.org

2. 2 Outline Motivations Activities Goals Sub-projects: Methodology for reliable reconfigurable systems design Design of Totally Self-Checking components Design of a Fault Injection environment General information

3. Motivations SRAM-based FPGAs are particularly sensible to radiation effects not only in critical environment, but also at terrestrial level alpha particles hitting devices cause temporary and permanent faults temporary faults can be modeled as Modification in the data being processed user-memory corruption Modification of the functionality being performed configuration-memory corruption Embedded systems implemented on FPGAs need “robustness” to radiations, achieved by means of by-design fault tolerance

4. 4 Activies Designing reliable systems implemented on FPGAs, able to cope with the effects of faults caused by radiations Appling already known and well studied detection and recovery techniques to the particular FPGA scenario Exploiting dynamic partial reconfiguration to trigger the reconfiguration of the affected portion of the architecture … while the rest of the system is still working … without needing to entirely reprogram the system Enabling the assessment of reliable system properties by means of fault injection and simulation

5. 5 Goals Creation of a methodology for the design of reliable reconfigurable embedded systems Implementation of a library of Totally Self-Checking components Implementation of a fault injection environment for FPGA systems

6. Design Space Exploration Definition of a framework for the design space exploration aiming at Estimating the costs and benefits deriving from the possible different solutions Exploring the solution space on the based of several metrics E.g.: size of the subsystems, size of the data widths Identifying most promising solutions Implementing the selected solution 6

7. Totally Self-Checking Components Design Design of a library of standard Totally Self-Checking components to be provided to the methodology for FPGA based reliable system design Examples: Checkers Voters Controllers... 7

8. Fault Injection Environment Implementing a fault injection platform for analyzing fault effects (the adopted fault model is the Single Event Upset -- SEU) and the effectiveness of the applied fault detection/tolerance techniques Important issues: Observability and controllability of fault injection Non intrusiveness Efficiency in simulation (e.g., check-points) 8

9. 9 General Information Webpage www.dresd.org/?q=r4r Mailing List r4r-ml@dresd.org Contact For more information on Reliability 4 Reconfiguration: r4r@dresd.org For a complete list of information on how to contact us: www.dresd.org/?q=contact_r4r Related work – wiki: www.dresd.org/?q=soa_r4r