1. Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

2. Data Mover Method: Using VLSI Testing: in logicworks and mentor graphics

3. Objective The main objective is to build a Data Mover with testable features to transfer data from the input to the output following a geometric algorithm. This type of design will require the use of CMOS technology and logic gate design to be fabricated into a chip.

4. Standards

5. Table Of Content Block diagram Theory 4-bit data mover (2-bit example) Timing table Controller circuit Complete data mover (two bits example)

6. Table Of Content (2) Trace of data mover What is done so far Circuitry tested VLSI chip designs Question section

7. Block Diagram

8. Theory Following RTL Design Data mover: Memory a[4]; b[4]; c[4] Inputs: x[4] Outputs: z[4] 1 a x 2 c /a 3 b c[0], c[1] 4 c a v b 5 z = c

9. Data Mover LW Design

10. Timing Table

11. Controller Circuit

12. Data Mover Data mover Using 2-bits

13. Trace Of Data Mover This is the sequence the controller must follow to achieve an optimum flow of the data

14. What Is Done So Far Researched about the behavior of data mover circuit Designed controller circuit for timing Working in actual VLSI design of D flip- flop and gates

15. Nand Gate Design In VLSI

16. Inverter Design Using VLSI

17. D Flip-flop Design In VLSI

18. Work Left To Do Finish D flip-flop in professional version Do more testing on the overall circuit Research about more possible applications Send the design for fabrication

19. Thank You! Any Questions?