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Level 0 Topology Trigger Falk Meissner LBNL CTB Readout Topology CTB-DSM Tree Trigger Algorithm UPC Trigger Other Examples Motivation : Level 3 requires.

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Presentation on theme: "Level 0 Topology Trigger Falk Meissner LBNL CTB Readout Topology CTB-DSM Tree Trigger Algorithm UPC Trigger Other Examples Motivation : Level 3 requires."— Presentation transcript:

1 Level 0 Topology Trigger Falk Meissner LBNL CTB Readout Topology CTB-DSM Tree Trigger Algorithm UPC Trigger Other Examples Motivation : Level 3 requires full readout of TPC; it’s a filter not a trigger. Need to identify potentially interesting events in Level 0 to reduce background events where is TPC readout. Why in parrallel, better use of bandwidht /avail;able events, Calibration, Disadvantage: Need to separate events for analysis.

2 CTB Readout Topology 240 CTB Slats 16 ‘pixels’ of 15 slats read out by one DSM board phi*eta = 1.5 * 0.5 per pixel Basic Topology given by readout: Four rings in eta divided into quadrants. Top, Bottom, South, North symmetry after change of CTB cable map.

3 CTB-DSM Tree 3 Layers of DSM boards 104 ns per board 16/32 bits between layers Algorithms are limited by time constrain and number of available bits between layers.

4 Trigger Algorithm for UPC 0nly two oppositely charged tracks at low total p T Back- to-back in transverse plane Multiplicity per pixel: 1 or 2 mips in 1 or 2 slats Good Topology: SE-NE; SW-NW; SE-NW; SW-NE; Veto if: any hit in top or bottom any overflow out of time hit

5 Level-0 CTB Algorithm 2000 Central Trigger: sum ADC counts of all 240 CTB slats; require minimum count for central trigger 2001 Multiplicity/Topology Trigger: in parallel to central trigger –Convert ADC counts to # of Mips –Sum #of Mips for all slats –Sum #of hit slats –Multiplicity criteria on minimum and maximum # Mips and # hit slats in each of the 16 CTB pixels –Combine 16 pixels to topology decision –Possible veto if any overflow in pixel multiplicities –Veto out of time hits: leading edge within 20 ns (ADC integration time ~60ns) Possible parallel trigger decisions: –Central trigger: MipMin <  Mips –Topology trigger: Pixel topology * No out of time hits * No Pixel overflows

6 Other Possible Applications SVT Cosmic Trigger Trigger on low multiplicity coincidence in top and bottom Inner pixels only Possible to require crossing of inner membrane Jet Trigger for pp ? high multiplicity in a limited number of slats in one pixel

7 Summary/Status Code for all 3 layers of DSM’s implemented and tested on mock-up in Berkeley No cosmic test with STAR yet; a.s.a.p. Change of topology requirements simple Create your own burrito; two criteria: – Mip and Slat multiplicity per pixel – Good topology combinations Long write-up with more technical details available

8 ‘Re-Cabling’ of the CTB Reorder cable assignments in the front of the patch-panel – Internal change of cable map 5 slats (30 degrees) in West and 10 slats (60degrees) the East half of the CTB. Get symmetry Top, Bottom, South, North Ultra Peripheral Collisions: Use Top and Bottom quadrants as veto for cosmic rays. Spin: left-right symmetric trigger for single-spin asymmetry measurement with transverse beam polarization

9 No Impact to Central Trigger Caution: hard-coded indexing of slat numbers in software will cause problems – But, should not be there Proposed Change


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