1. TCL/Tk Based Environment for Mixed-Signal Circuit Design System Description Software Architecture Examples Future Directions Summary

2. System Description Designing Circuits Software Architecture Celerity Camelot New Environment

3. Designing Circuits Designer Create/modify schematic Make netlist Shrink netlist Run Simulator set libraries read circuit simulate run plotter read in results plot Typically put in a script

4. Software Architecture CamelotCelerity Start-up TCL Code Netlist Circuit TCL Code Output File Plot Script Plotter (optional shrink)

5. Celerity Analog Circuit Simulator created by Bell Labs Design Automation TCL/Tk - C - C++ Many powerful features, modular design, Built-in plotting package Cadence purchased BLDA from Lucent Celerity now being phased out by Cadence Celerity User Interface (TCL/Tk) Celerity C++ Engine Plotter Output file

6. Camelot Originally developed for use with general optimization problems First used only for parameter extraction Main Objects data table parameter table model handler optimizer handler Additional uses arose Optimization of small number of performances to targets - worst-case file generation Data manipulation and viewing Driving other programs and collecting results No Camelot/Spectre interface - Spectre is a batch simulator Future of Camelot uncertain

7. Camelot/Celerity Interface Object-based paradigm Celerity process is created and a communications link is established A controlling handle command (object) is created for communication with the process Object has low and high-level methods for sending and retrieving information from the remote process A registry of objects is maintained by the class UnixShell> tcad camelot Camelot> celerity c Camelot> c circuit “.TITLE TRY IT V1 1 0 1.0 M1 1 1 0 0 NS1.OUT ALL.END “ [lcmos -tech 035-3V] c command “.DC OP;.OP *”

8. Circuit Object Methods (Partial list): circuit {ckt_lines}: Establish Main testbench circuit monitor {args}: Specify node voltages or element currents setlibs {args}: Establish paths to library files command {commands}: Issue a command to the Celerity simulator ic {args}: Establish initial conditions info {args}: Request information about the circuit node {node}: Request node voltage element {element item}: Get information about an element in the circuit op {file}: Dump operating points to a file if specified or to screen if not win: Display text window with interactive connection to celerity measurement {name body}: Define measurement to be performed for each case file analysis_data {analysis {way advice}}: Return data object containing analysis data

9. Data Object Creating Data Object: data d0 Reading Data d0 read meas.dat Accessing Data Get First Entry d0 get 0 0 Set Last column in First Row to 1.1 d0 set 0 last 1.1 Labels Label 3rd column as Vgs d0.col label 2 Vgs Add Four Columns d1.col extend 4 Plot Data d0 plot Vgs Ids

10. Writing the Script Procedure “makeproc”: Saves designer from writing common code Util.tcl Procedure makeproc {ckt} {... set p “procedure blank {…} {… }” regsub $p blank $ckt x set fptr [open $ckt.tcl w] puts $fptr $x … }

11. Components of the Script Setup Global Variables (temperature, library path, etc) Initialize list of valid analyses Call post-layout procedure if necessary foreach anal $anallist { Save previous results Shrink circuit if required Read circuit switch $anal { op {…} ss {…} nv {…} refresh {…} } Save Results Call View Procedure } foreach anal $valid { Make Button Panel }

12. Post Layout Procedure “subpost”.MAIN ckt X1 1 0 A X2 2 0 B.END.subckt A ….finis.subckt B ….finis.subckt A ….finis.subckt B ….finis Current Working Directory Post-layout directory “post” Netlist from simulator Netlists from Layout Extraction

13. View Procedure “view” proc view {name file {label “”}} { Create Script File for Plotter find out how many blocks (nblocks) exec ttcad celplot -b file_name }.cl.re $file.bl 1 $label=$name.bl 2 $label=$name ….ti $file [date] Celerity plotting package

14. Examples

15. Examples (cont.)

16. Future Directions Many Enhancements are possible Display analysis scripts on screen and allow for editing Expand plot script to handle more complicated cases Use BLT and data object features for better viewing Include math on results Include post-layout feature in GUI Provide GUI for circuit object methods Add more elaborate version control Don’t re-read the circuit if it hasn’t changed Incorporate library panel into circuit panel

17. Summary TCL/Tk works well for gluing CAD Components Saves Designer’s time for iteration during design phase Allows Designers to share scripts easily Keeps all scripts for circuit in one place Automates post-layout simulation with keyword TCL features allow for easy post-processing of simulation results BLT permits nice graphic interfaces (pole-zero plots, text windows, etc.)