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Senior Design 1 Project RNG: Radiation-Based Random Number Generator Team Oregon Chub –Ashley Donahoo –Colton Hamm –Alex Brotherston –Matt Johnson University.

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Presentation on theme: "Senior Design 1 Project RNG: Radiation-Based Random Number Generator Team Oregon Chub –Ashley Donahoo –Colton Hamm –Alex Brotherston –Matt Johnson University."— Presentation transcript:

1 Senior Design 1 Project RNG: Radiation-Based Random Number Generator Team Oregon Chub –Ashley Donahoo –Colton Hamm –Alex Brotherston –Matt Johnson University of Portland School of Engineering Advisor Dr. VanDeGrift, Dr. Hoffbeck, Dr. Osterberg Industry Representative Mr. John Haner Bonneville Power Administration

2 Senior Design 2 Introduction Our project generates random numbers from radioactivity Building a radiation sensor, designing a MOSIS chip and using 7-segment displays University of Portland School of Engineering

3 Senior Design 3 Scorecard Got functional spec 1.0 approved Have a working pulse-generator Designed MOSIS chip timer and comparator University of Portland School of Engineering

4 Senior Design 4 Additional Accomplishments Simulated and constructed a prototype voltage multiplier circuit Met with E-scholar University of Portland School of Engineering

5 Senior Design 5 Plans Complete MOSIS design Have design document 0.95 approved Purchase geiger tube University of Portland School of Engineering

6 Senior Design 6 University of Portland School of Engineering Milestones StatusDescriptionOriginal Target Previous Target Present Target CompletedCustomer Interview16 Sep 10 CompletedFunctional Spec Draft.9024 Sep 10 CompletedSimulate Pulse Generator & Transformer in PSPICE 1 Oct10 29 Sep 10 CompletedMOSIS Chip: Timer3 Oct 10 CompletedFunctional Spec Draft.958 Oct 10 CompletedFunctional Spec 1.015 Oct 10 14 Oct 10 CompletedComparator designed and tested in B2 Logic 17 Oct 10 16 Oct 10 CompletedSimulate the Voltage Multiplier in PSPICE 31 Oct 10 15 Oct 10 On trackSubmit initial.edf file31 Oct 10 On trackSimulate pulse generator, transformer, and voltage multiplier interfacing in PSPICE 14 Nov 10 On trackSubmit final.edf file19 Nov 10 On trackDesign Document v0.9519 Nov 10

7 Senior Design 7 Concerns/Issues We are experiencing difficulty simulating a transformer with a load in PSPICE. If we are unable to make the simulations work, we will begin prototyping the high- voltage supply ahead of schedule, giving us time to address any problems that may arise. University of Portland School of Engineering

8 Senior Design 8 Conclusions MOSIS chip design is on schedule. Analog design is on schedule, though simulation problems may cause setbacks in the coming month. University of Portland School of Engineering

9 Senior Design 9 Questions? University of Portland School of Engineering


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