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RapidIO Overview October 2002
© Copyright 2002 RapidIOTrade Association RapidIO Steering and Sponsoring Member Companies
© Copyright 2002 RapidIOTrade Association Member Company Categories System Logic & IP Cadence Cypress Semi Emulex Hifn IC4IC Ltd. Leopard Logic LSI Logic Marvell Mindstream National Semi RedSwitch PLX PMC Sierra Silicon Logic Eng Stargen Tundra CPUs, DSPs, NPUs Analog Devices IBM IDT Intel Intrinsity Motorola Texas Instruments Test Equipment Agilent Tektronix Teradyne System OEMs Alcatel Cisco Systems DY4/Force EMC Ericsson Huawei Technologies Lucent Mercury Computer Nokia Raytheon Rydal Research SKY Computer Spectrum Signal Processing Systran Tek Microsystems Thales Computers Vivace Networks VMETRO FPGA Actel Altera Xilinx Quicklogic Software MontaVista OSE Systems QNX WindRiver Design Tools Cadence Synopsys
© Copyright 2002 RapidIOTrade Association What is RapidIO? Packet-based memory-mapped switched interconnect architecture for in-system communications –Also supports device-level messaging –Also supports cc-NUMA (Globally Shared Memory) –LVDS Parallel interface for processors –SerDes Serial interface for DSP, Serial Backplane applications –High reliability –Open Standard
© Copyright 2002 RapidIOTrade Association Common Networking Topology Line Card DSP RapidIO ASIC RapidIO ASIC MEM Ethernet / IP ATM / SONET Infiniband / Fibrechannel TDM Voice Traffic Physical Layer Interface Physical Layer Interface Data Serial RapidIO Data Path Fabric RapidIO Fabric Control Plane Traffic Aggregation Traffic Aggregation NPU Host uP Host uP Control DSP Host Card MEMy Host uP MEM Host uP RapidIO Fabric RapidIO Fabric Ethernet
© Copyright 2002 RapidIOTrade Association Supported Application Classes Processor Local Bus Processor Clustering –Coherent and Non-Coherent DSP Farm Serial Backplane These applications are supported by the current specs
© Copyright 2002 RapidIOTrade Association Protocol Enhancements Virtual Channels Packet/Cell Encapsulation Flow Control Multicast Relaxed Acknowledgement Rules Possible enhancements to RapidIO that are currently under consideration These enhancements are designed to make RapidIO more suitable as a data- plane technology for embedded systems
© Copyright 2002 RapidIOTrade Association Supporting Technologies/Standards System Bringup APIs –Software APIs for booting and configuring systems HIP Platform Specification –Hardware interoperability evaluation board Error Management Specification –Hardware and Software specs for the handling of errors detected by RapidIO in a system
© Copyright 2002 RapidIOTrade Association Mechanical Standards Mezzanine Card –Work going on the extend PMC card standard to support RapidIO RapidIO on cPCI 2.x –Taskgroup working to produce standard for mapping of Serial RapidIO in CompactPCI 2.x chassis
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