1. Status of RF synchronization and fast trigger distribution Reported by H. Damerau (CERN) Acknowledgements: J. Moody, P. Muggli (MPP), D. Barrientos, T. Bohl, A. Butterworth, S. Doebert, W. Hofle, J. Molendijk, S. Rey, D. Stellfeld, U. Wehrle (CERN) 19 August 2015

2. Simplified overview of AWAKE synchronization and RF distribution Laser PLL Fiber receiver/trans mitter 3 GHz master GPS receiver Fiber receiver/trans mitter SPS synchro crate 88.2 MHz (laser) 2997.9 MHz (reference) 10 MHz (reference) 9.97 Hz, 8.68 kHz, 400.4 MHz, 10 MHz Fractional divider SPS Main RF divider 400.4 MHz Fast pulse triggers Buffer amplifiers Electron LLRF Various frequencies distributed (many!) Fast pulse triggers (~20 adjustable) Laser Buffer amplifiers Fast pulse triggers 176.3 MHz Timing 200.2 MHz Proton LLRF Extraction and bunch rotation triggers BA4 TSG40 BA3/Faraday Cage 2

3. Laser phase locked loop and RF reference 1.Laser phase-locked loop 2.3 GHz low-noise reference oscillator 3.GPS receiver for 10 MHz frequency reference  Engineering specification draft prepared –https://edms.cern.ch/file/1516886/1/2015-03- 02_AWAKE_EngSpecTemplate_v0.0_LaserLockedLoop_draft2.pdfhttps://edms.cern.ch/file/1516886/1/2015-03- 02_AWAKE_EngSpecTemplate_v0.0_LaserLockedLoop_draft2.pdf –Feedback from potential supplier expected by end of this week  GPS reference part of package, but could be acquired separately  Most probably also separate optical transmission from BA4  TSG40 with transmitter/receiver provided by CERN 3

4. New electronic designs 1.Receivers and transmitters for compensated fibre transmission (Diego, John, BE/RF/CS), LHC-type VME form factor  Conceptual design and choices of components completed  Detailed electronics design progressing well 2.Main divider and fractional divider boards (Stephane, HD, BE/RF/FB), LHC-type VME form factor  Conceptual design essentially frozen –https://edms.cern.ch/file/1516886/1/FrequenciesTimings3GHzReferencePhaseD iscriminator_2015-04-24.pdfhttps://edms.cern.ch/file/1516886/1/FrequenciesTimings3GHzReferencePhaseD iscriminator_2015-04-24.pdf  Electronics development can only start in September –Critical hardware, critical path for first prototype in early 2016 4

5. Synchronization with SPS 1.Synchronization crate (as for LHC) in BA3/Faraday Cage (Thomas, Urs, BE/RF/BR and BE/RF/FB)  Decision to keep separate RF synchronization  Detailed layout of synchronization extraction process –https://edms.cern.ch/file/1516892/1/ExtractionTimingsSPS-AWAKE_2012-07- 13.pdfhttps://edms.cern.ch/file/1516892/1/ExtractionTimingsSPS-AWAKE_2012-07- 13.pdf –https://edms.cern.ch/document/1516892/1https://edms.cern.ch/document/1516892/1  No new electronics development required –Status of spare modules to be checked and made operational –Possibly production run of some hardware  Installation and commissioning expected this year (if boards available) 5

6. Cabling, crates, racks 1.Two special racks TSG40 (EN/EL and BE/RF FSU team)  Installed by EN/EL and BE/RF FSU team 2.RF distribution cabling  Completed (fully?) under supervision of Guillaume (EN/EL)  many thanks! 3.Optical fibers (TSG40 to BA3 and BA4)  Request submitted to Jeremy (EN/EL)  Separate fibers for GPS reference from BA4 during 2015/16 YETS 4.Special LHC-type VME crates (Donat, BE/RF/FB)  Crate in BA3/Faraday Cage installed  New production run including crates for AWAKE launched 6

7. RF distribution and fast trigger pulses 1.RF distribution  No new electronics development required –Most probably production run of existing distribution buffers 2.Fast trigger pulse generation  One board per channel (~20 channels)  No new electronics development required –Production run of existing VTU (or CTU) boards  Compile detailed ‘shopping list’ of boards to be tested or reproduced (HD) 7