1. Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems Victor S. Reinhardt Raytheon Space and Airborne Systems El Segundo California Presented at The 2005 Joint IEEE International Frequency Control Symposium and Precise Time and Time Interval (PTTI) Systems and Applications Meeting (Paper to be Published in Proceedings) The Hyatt Regency Hotel, Vancouver, Canada. August 29-31, 2005

2. Page 2 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Introduction — Overview Time jitter is an important parameter for determining the performance of digital systems This paper will review the mechanics how time jitter impacts the performance of such systems ~ Agenda ~ Introduction & overview A statistical framework for later discussions Discuss time jitter impact by category of digital system Conclusions-Summary Note: This presentation has been updated based on audience comments

3. Page 3 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Categories of Digital Systems for Discussing Impact Time Jitter Categories somewhat overlap Synchronous data transfer – Common clock distributed along with data – Cancels most direct effects from clock oscillator – Gate timing jitter generates bit errors Asynchronous data transfer – Only data distributed & local clocks regenerated – Includes digital communications systems – Additional bit errors caused by relative master-local clock oscillator (MO-LO) jitter Digital sampling – Analog signals are sampled & digitized or visa versa – A/Ds & D/As: Sampling clock jitter generates noise power – Communications systems decision circuits: Sampling clock jitter causes bit error rate (BER) degradation Dig Clock Data Dig Clock Data A/D Digital Data Clock Analog Digital sampling Asynchronous Synchronous Voltage PLL Clock

4. Page 4 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Types of Degradation Caused by Time Jitter Hard bit errors – Direct bit errors without any other factors involved – Data clock jitter moves clock edge out of correct data transfer window Soft bit errors (BER degradation) – Increase in BER when thermal noise is present (no errors when no thermal noise) – Occur in symbol (or bit) decision circuits which turn an analog signal into digital symbol stream by sampling – Clock jitter causes BER degradation by generating variations in sampled signal A/D & D/A noise power – Sampled voltage noise caused by time jitter induced variations – This noise power decreases the effective number of bits (ENOB) of A/Ds & D/As Time Jitter Causes Data Transfer Errors Data Hard Errors Data Window Clock Soft Errors & Noise Power V t Time Jitter Causes BER Degradation & Generates Noise Power VV Cloc k

5. Page 5 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Defining Time Error in Digital Systems Two definitions of time error – Data transfer: Time error is between data clock edges & data symbol centers – Digital sampling: Time error is between sampling clock edges and correct analog epoch Time error broken into two components – Skew = average error Fixed plus long term and environmental changes Usually measured by an N-sample mean – Jitter = short term variation Specified as RMS, peak, or peak-to-peak relative to skew RMS usually interpreted as N-sample standard deviate Bit errors function of total error so jitter must reference skew Noise power caused by jitter alone so reference to skew not important (Skew important for sampling accuracy) Jitter Data Clock Data Transfer Skew Jitter Digital Sampling t Total Time Error = Skew + Jitter V(t) Error Skew

6. Page 6 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt A Statistical Framework for Time Jitter & Digital Systems Background for Statistical Approach Chosen Digital community has historically dealt with time jitter using stationary statistics – The standard variance generally used as the jitter measure – Bandwidth (BW) and non-stationary noise (1/f n noise) issues often not explicitly dealt with – Become important to treat BW & 1/f n issues explicitly because time jitter requirements now in ps & sub-ps regions Precise time community has historically dealt with BW & 1/f n issues using 2 nd difference measures of jitter – But these 2 nd difference measures not easily connected to the skew The statistical framework presented here will attempt to meld both approaches – Will use the standard variance as jitter measure because it directly references the skew – Will rigorously deal with BW and 1/f n noise issues – Will show that the standard variance can be used with 1/f n noise because of unique properties of digital systems

7. Page 7 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Definition of Two Associated Time Error Variables Clock reading (normalized phase) error x(t) =  (t)/   – Difference between subject and reference clock readings at same time – x(t) can be considered continuous variable--derived from  (t) – Will use x in presentation Time (zero crossing) error  t(t n ) = t’ n – t n  – x(t n ) – Difference between subject and reference clock edges at same cycle or period count – Is approximately the negative of x(t n ) x(t) is the derivative of the fractional frequency error y =  f/f o = dx/dt = - d(  t)/dt – x preferred because no minus sign fofo Freq SourceCycle Counter Basic Clock Clock Reading = Cycles in 1/f o units xx tt t t’ n Ref Clock Reading Subject Clock Reading t tntn V(t) = A(t)F(   t+  (t)) V ref (t) = A o F(   t)  ref = 0 By Definition F(.) = Periodic Function

8. Page 8 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Jitter measure will be N-sample unbiased standard variance – Ensemble average of the arithmetic mean of N squared 1 st differences between x n and skew M x (N) – Has well known convergence problems for 1/f 3 noise – Will show is mitigated in digital systems by h s (t) N samples x n spaced by interval  x n derived from convolution of continuous x(t) with explicit system phase response function h s (t) – Explicit use of h s (t) will be important Skew = N-sample arithmetic mean Discrete Samples x n and Jitter Measure System Response Phase h s (t) Contin- uous x(t) =  (t)/   N Discrete Samples x n Spaced by  = Ensemble Average

9. Page 9 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Closest 2 nd Difference Variance For Comparison Ensemble average of arithmetic mean of N squared 2 nd differences of x n ’s More familiarly written in terms of N-sample fractional frequency Allan variance  2 y (N, ,  ) * Well behaved for 1/f 3 noise But eliminates direct reference to skew M x (N) * See: B. E. Blair, Ed, Time and Frequency Fundamentals, NBS Monograph 140, U. S. Govt. Printing office, 1974 (CODEN:NBSMA6), p 166.

10. Page 10 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Kernel K x (f) = K xd (f) or K xa (f)  Describes the variance – Why a kernel? K x (f) for N samples cannot be represented by the square of a single response function S x (f) = Double-sideband (DSB) power spectral density (PSD) of x(t)  Describes the noise – L x (f) = ½S x (f) = SSB PSD H s (f) = DSB Fourier transform of h s (t)  Describes the system – System assumed linear in phase – H s (f) can contain high & low frequency BW cut-offs Spectral Integral of Variances  2 xd ( ,N) &  2 xa ( ,N) System Response |H s (f)| 2 System Properties Variance Kernel K x (f) Variance Properties S x (f) x2x2 Frequency from Carrier f S x (f) (double sideband PSD) Integration Region |H s (f)| 2 K x (f) H s (f) can have LF cut-off

11. Page 11 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Kernels of  2 xd ( ,N) &  2 xa ( ,N) Standard Variance  2 xd ( ,N) – For N  f  << 1: K xd (f)  f 2 – Converges for S x (f) = 1/f 0 … 1/f 2 – Also converges for 1/f 3 & 1/f 4 if H s (f) contains appropriate highpass filter 2 nd Difference Variance  2 xa ( ,N) – For N  f  << 1: K xa (f)  f 4 –  2 xa converges for S x (f) = 1/f 0 … 1/f 4 Log(f  ) dB K xd K xa (N=100) f  = 1/N K xd & K xa vs f  f4f4 f2f2 f2f2

12. Page 12 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Properties of  2 xd ( ,N) as N   When N   K xd  1 and  2 xd ( ,N)  Single point standard variance  2 x-std – Again  2 x-std can exist for 1/f n noise because of |H s (f)| 2 – When there are mathematical difficulties with  2 x-std can fall back on  2 xd (N) with large but finite N |H s (f)| 2 often approximated by square bandpass filter – Then – f l = low frequency cut-off– f h = high frequency cut-off

13. Page 13 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Impact of Time Jitter on Digital Systems by Category Will use framework just presented to discuss impact by category – Synchronous data transfer systems – Asynchronous data transfer systems – Digital sampling systems Will show that  2 xd ( , N) &  2 x-std can be used because of properties of these systems

14. Page 14 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Time jitter & Synchronous Systems Common clock oscillator distributed to all units – Cancels most direct clock oscillator effects – There is some residual high pass filtered oscillator noise due to time misalignment between clocks H s (f) = 4sin 2 (  m )  f 2 for f  m << 1 Both gate and residual oscillator noise can be modeled by white plus 1/f noise terms S x (f) = g 0 (1 + f k /f) – f k = 1/f or flicker knee  freq where 1/f noise PSD = white noise PSD H s (f) can be approximated by square lowpass filter – f l = 0– f h = f g = gate noise bandwidth Note f h is not equal to f o the clock frequency but f g Usually f g >> f o so aliasing of white noise is a major issue Common Clock Oscillator Frequency = f o Gate Noise BW = f g Digital Subsystem Common Clock Data Digital Subsystem Delay  m

15. Page 15 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Aliasing of White Noise in Digital Systems Aliasing occurs because discrete digital system is equivalent to system sampled at f o – Logic sees noise frequencies up to f h = f g (and f g >> f o ) – The sampling aliases the original S x (f) over BW f g into BW f o – This aliasing multiplies white S x (f) by factor of f g /f o Aliasing can also impact counter measurements because of large counter f h compared with f o – Counter f h may be much higher than gate BW f g S x (f) S x multiplied by (f g /f o ) due to aliasing Original S x (f) fgfg fofo 2f o 3f o.. Freq from carrier Sampled noise has same  in BW f o Analog noise nT 0 ToTo 2T o 3T o... Clock Cycles

16. Page 16 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt For Synchronous Systems 1/f Effects are Negligible For S x (f) = g 0 (1 + f k /f) can calculate  2 xd ( , N) Time T k = N  where 1/f noise term = white noise term given by For all logic types T k >>> Life of universe and 1/f noise can be ignored for all practical N  values Thus for synchronous systems need use only white noise component of S x (f) [N >>1]

17. Page 17 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Time Jitter & Asynchronous Systems (Shown as Communications System) Data sent between units without clock * – Clock recovery phase locked loop (PLL) regenerates clock & tracks Rx clock LO to Tx clock MO – Because of this there is additional MO-LO clock oscillator jitter System response has two components – Clock recovery PLL response H p (f)--provides low frequency cut-off at loop BW B p – Tx-Rx link response H h (f)--provides high frequency cut-off f h  R s /2 (R s = Symbol rate) for communications systems Also other asynchronous systems such as RS-422 – f h less easily specified (Worst case f h = f g ) Tx Filter Modulated Data Clock Recovery PLL H p (f)  Loop BW = B p Clock Master Osc (MO) Tx Digital Mod- ulator Transmitter Rx Filter Rx Digital De- Mod Link Response H h (f) * See: Victor S. Reinhardt, The Calculation of Frequency Source Requirements for Digital Communications Systems, Proceedings of the IEEE International Frequency Control Symposium 50th Anniversary Joint Conference, 24-27 August, 2004, Montréal, Canada. Slides at http://www.ieee-uffc.org/freqcontrol/Reinhardt_files/frame.htmhttp://www.ieee-uffc.org/freqcontrol/Reinhardt_files/frame.htm Clock Local Osc (LO) Receiver Deci- sion

18. Page 18 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt S x (f) = sum of PSD’s of all oscillators in Tx-Rx link H p (f) = clock recovery PLL response function H h (f) = DSB complex envelope response function of Tx-Rx link |1 – H p (f)| 2 provides LF cut-off at PLL loop BW B p – 2 nd PLL will cancel 1/f 3 noise completely – 1 st order PLL will leave residual 1/f for 1/f 3 S x (f) But has negligible effect on  2 xd ( ,N) (See synchronous systems) However susceptible to cycle slipping |H h (f)| 2 provides high freq cut-off f h Standard Variance for MO-LO Jitter S x (f) (Sum of all Clocks ) Frequency from Carrier f fhfh |1-H p (f)| 2 |H h (f)| 2 f l = B p Variance Integration Region  f 4 for 2 nd Order PLLs

19. Page 19 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Time Jitter & Digital Sampling Time jitter generates random variations in sampled voltage In communications systems decision circuits – Random voltage variations interact with thermal variations to produce BER degradation – BER degradation is derived using a Gaussian x n with  2 x-std from asynchronous transfer – Time jitter requirements approach 1 ps at > GHz symbol rates -12 -11 -10 -9 -8 -7 -6 -5 30405060708090 Symbol Rate - dBHz Jitter - log(sec) RMS Jitter Reqs for QPSK @ 0.1 dB BER Deg Time Jitter Generates Random Variations in Sampled Voltage V(t) t Timing Skew 1-bit 0-bit Time Jitter & Digital Sampling

20. Page 20 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Noise power consists of random variations in sampled voltage generated by slope modulation of signal For sinewave signal * SNR jitter -1    2 =  s 2  x-std 2 =  V 2 /P s – f h = f g unless otherwise restricted – Note SNR jitter is independent of number of digitized bits – Means SNR jitter reqs more severe as number of bits increases Can convert SNR jitter to an ENOB by – By equating SNR jitter to quant error SNR – And assuming a given signal power level Voltage PSD for white-x noise S V (f)  (f h /f o )  s 2 g o P s (  x-std 2 = f h g o ) In A/Ds & D/As Time Jitter Generates Noise Power * see: Analog Devices, Mixed-Signal and DSP Design Techniques, Section 2, Sampled Data Systems, http://www.analog.com/Analog_Root/static/pdf/dataConverters/MixedSignal_Sect2.pdf, p35 Near Zero:  =  s x =  V/A -  s = 2  f s =SW Ang freq - P s = SW power = A 2 /2 - f o = Sampling clock freq Sinewave (SW) Signal V(t) = A sin(  s t+  ) Time Jitter Noise Power  V 2A x Phase Jitter 

21. Page 21 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt ENOB tot values generated from * – Signal level @ 10 dB back-off (BO) from full scale (FS) Typical BO for complex signals – SNR tot = 2SNR jitter = SNR quant Assumes SNR jitter = SNR quant Is major limiting issue for high speed A/Ds and D/As ENOB Limits from Time Jitter Generate Stringent Requirements * Differs from ENOB defined in other sources which use full scale signal level – 10 dB BO more realistic (& conservative) Log 10 (SW Freq – Hz) SNR tot-dB - dB 1 ns 0.1 ns 10 ps 1 ps 0.1 ps Time Jitter ENOB tot for 10 dB BO 8 6 10 12 14 16 18 20

22. Page 22 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Noise Power & Non-White noise For non-white noise the appropriate  2 xd ( ,N) &  2 x-std can be generated as follows Synchronous sampling system – Sampling clock derived directly from the analog signal clock – See  2 x-std from synchronous data transfer Asynchronous sampling system – Sampling clock locked to analog signal clock though PLL (or equivalent) – For MO-LO jitter see  2 x-std from asynchronous data transfer – For gate jitter see  2 x-std from synchronous data transfer – Total variance is sum of the above Unsynchronized sampling system – Independent sampling and signal clocks – For up to 1/f 2 noise can use  2 xd ( ,N) – There will be divergence and accuracy issues from 1/f 3 noise unless there is calibration in system that has implicit low frequency cut-off

23. Page 23 Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source reference is listed on each page, section, or graphic utilized. A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Conclusions--Summary Should explicitly use system response h s (t) so standard variances  2 xd ( ,N) &  2 x-std can be used with 1/f n noise For synchronous transfer need only use white noise component of S x (f) for  2 xd ( ,N) &  2 x-std – Common clock cancels out oscillator 1/f 2 and 1/f 3 noise – 1/f noise term negligible compared with white noise term – Aliasing significantly increases white noise PSD – Time jitter causes hard errors For asynchronous transfer there is an additional MO-LO jitter term – Has oscillator 1/f 2 and 1/f 3 noise components – PLL loop BW provides LF cut-off so  2 xd ( ,N) &  2 x-std exists – Time jitter also causes BER degradation (soft errors) Noise power in digital sampling (A/Ds & D/As) – Limits effective number of bits (ENOB) – Clock jitter is critical limitation on high speed A/D & D/A performance