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From Scenic to SystemC Mehrdad Abutalebi. Outline Introducing Scenic Scenic Implementation Modeling Reactivity A Simple example From Scenic to SystemC.

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Presentation on theme: "From Scenic to SystemC Mehrdad Abutalebi. Outline Introducing Scenic Scenic Implementation Modeling Reactivity A Simple example From Scenic to SystemC."— Presentation transcript:

1 From Scenic to SystemC Mehrdad Abutalebi

2 Outline Introducing Scenic Scenic Implementation Modeling Reactivity A Simple example From Scenic to SystemC

3 Introducing Scenic Introduced in 1997 by Stan Liao, Steve Tjiang, Rajesh Gupta An Efficient Implementation of Reactivity for Modeling Hardware in the Scenic Design Environment Based on the researches on UC Irvine and Synopsys

4 Scenic Implementation Modeling Reactivity Concurrency Signals and Events Waiting and Watching Modeling Structures and Data Types Ports as C++ references to Signals std_ulogic Simulation of Reactive Systems Process Driven (a type of Cycle Simulation)

5 Modeling Reactivity Concurrency Can be modeled with program threads Implementing sc_process class for encapsulating process behavior Use virtual function for describing process behavior Sub typing sc_process and overwrite entry() virtual function

6 Modeling Reactivity Signals and Events Processes use signals and events to communicate rather than using semaphores and critical regions as software synchronization threads Use templates of C++ for implementing signals

7 Modeling Reactivity Waiting and watching Wait refers to a blocking action that can be associated to an event “ wait_until(expression) ” Watch refers to a non-blocking action that runs in parallel with a specified behavior “ do p watching s ”

8 Modeling Reactivity Waiting A waiting process suspends itself until some event occurs. Uses delay-evaluate lambda expressions to avoid unnecessary context switching Watching Uses C++ exception handling mechanism, try, catch, throw

9 Modeling Structures and Data Types Structural description Component instances and their interconnections through port and port map Modeling ports as C++ references to Signals Data Types Implementing std_ulogic and std_ulogic_vector

10 Simulation of Reactive Systems Using process driven simulation For synchronous systems check the events during clock changes To reduce context switching checks on signal changes and condition are performed in scheduler

11 A Simple Example class Counter : public sc_process { const sc_signal & reset; sc_signal & iszero; int count; public: Counter( sc_clock_edge& EDGE, const sc_signal & ENABLE, sc_signal & ISZERO ) : sc_process(EDGE), enable(ENABLE), reset(REST) { count = 15; // initialization watching( reset == ‘ 1 ’ ); } void entry(); };

12 A Simple Example void Counter::entry() { try { if (count == 0) { write( iszero, ’ 1 ’ ); count = 15; } else { write( iszero, ’ 0 ’ ); count--; } next(); } catch(sc_user &) { if( reset.read() == ‘ 1 ’ ) count = 0; }

13 SystemC 0.9 Introduction of three types of processes sc_sync: (SC_CTHREAD)synchronous thread process same as sc_process in Scenic sc_async: (SC_METHOD) asynchronous function process sc_aproc: (SC_THREAD) asynchronous thread process Rich set of signal types and data types

14 SystemC 1.0 Implementing sc_module for class hierarchy sc-module as a container class for processes and also other modules Fixed points data types Implementing sc_port<> sc_in<>, sc_out, sc_inout<> Simplified syntax by implementing Macros and auxiliary operators


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