1. Microprocessor system design
Lecture 2
Muhammad Amir Yousaf

2. Von-Neumann Architecture
Instruction execution in Von Neumann Architecture
Von Neumann Architecture’s limitation
Harvard Architecture
Data Representation in computer
Muhammad Amir Yousaf

3. Von Neumann Architecture
Von Neumann, a mathematician and early computer scientist described a design architecture for electronic digital computer.
He was the first to spell out the requirements for a general purpose electronic computer. ‘
The architecture is still alive in the basis of modern computers
Muhammad Amir Yousaf

4. Von Neumann Architecture
To Von Neumann, the key to building a general purpose device was in its ability to store the instructions (along with data and temporary results) in it.
In a special purpose machine the computational procedure could be part of the hardware.
In General purpose computers instructions must be changeable.
Instruction are encoded into numeric form and stored in memory
Muhammad Amir Yousaf

5. Von Neumann Architecture
Major organs of Von Neumann architecture:
Memory
Control Unit
ALU
Input / Output
The arithmetic logic unit
The control unit
The memory
The input-output devices
Muhammad Amir Yousaf

6. Von Neumann Architecture
Von Neumann general purpose computer is a programmable machine that:
Store a set of coded instruction along with data in its memory.
Respond to instructions in a well defined manner(sequential or told otherwise).
Set of instruction is called program.
Memory can be loaded with new programs.
Muhammad Amir Yousaf

7. Instruction
An instruction is a binary coded command to perform a specific task:
Arithmetic and Logic Instruction.
Looping and decision making.
Transfer of data.
Transfer of control.
Muhammad Amir Yousaf

8. Execution of instruction
Instruction execution in Von Neumann computer
Get the coded instruction.
Decode the instruction.
Get the operand.
Perform the desired operation.
Communicate the results back.
Muhammad Amir Yousaf

9. Components of Von Neumann Computer
Memory: to store program and data.
Instruction Decoder: to decode the binary coded instructions.
Program Counter: to execute instructions in order.
Arithmetic Logic Unit: to perform logical and arithmetic operations.
Inputs/Outputs: to give the results back
Registers: Temporary data storage
Instruction Decoder
Program counter
RAM
Input / Outputs
ALU
Muhammad Amir Yousaf

10. Instruction Format
Instruction
Muhammad Amir Yousaf

11. Von Neumann Architechture
CPU
Memory
System bus
Execution unit
ALU
Registers BU
Both data and instructions
at the same system bus
Control unit IR PC
Controller
IO units

12. Execution unit The number of bits in the execution unit
usually denotes the processor’s size
For example an 8-bit processor stores 8-bits in registers and
performs 8-bit operations in the ALU.
Processor
Execution unit
Controller unit
ALU
Registers IR PC
Controller BU
The execution unit
comprise:
- ALU
Aritmethic Logic Unit
Performs arithmetic (+-*/)
and logical calculations
- Registers
Intermediate storing of
results

13. Unique signals for each processor bus
Bus unit
2N is the number of
adressable
memory positions
Processor
Execution unit
Control unit
ALU
Registers IR PC
Controller BU
Address (N-1:0)
Data (M-1:0)
Control
Request
Acknowlege
Read/Write
Etc.
System bus
Unique signals for each processor bus

14. Control unit, Registers
Processor
Execution unit
Control unit
ALU
Registers IR PC
Controller BE
The control unit comprise of:
IR, the instruction register
stores the instruction that
is executed
PC, the program counter
stores the adress to
the executing instruction
Controller, controls the other
parts (registers, bus unit
och execution unit

15. Instruction execution ADD $23,reg1
Data ($73) from memory,
equalizes the instruction ADD
Memory
10: $73 (ADD $23,reg1) …
23: $55
IO units
Processor
Execution unit
ALU
Registers
Control unit
IR:
PC: 10
Controller BU 73
Set the address bus to 10,
the control bus to read
Read data from address 10
Fetch instruction

16. Decode the machine code 73 to an instruction
ADD $23,reg1
Processor
Execution unit
ALU
Registers
Control unit
IR: 73
PC: 10
Controller BU
Memory
10: $73 (ADD $23,reg1) …
23: $55
IO units
Fetch instr.
Decode the machine code 73 to an instruction
ADD $23,reg1 is the instruction that
is to be executed
ADD $23,reg1
$73
Instruction decoder
Decode instr.

17. Read data from address $23
ADD $23,reg1
Value from reg1
Processor
Memory
10: $73 (ADD $23,reg1) …
23: $55
IO units
Execution unit
ALU
Registers
Control unit IR
PC: 10
Controller BU
Fetch instr.
Decode instr.
ADD $23,reg1
Data ($55) from memory
Set the address bus to $23,
the control bus to read
Read data from address $23
Fetch operand

18. The content in memory position
ADD $23,reg1
The content in memory position
($23)=55 is added with the
content in reg1: reg1 +$55
Processor
Memory
10: $73 (ADD $23,reg1) …
23: $55
IO units
Exekveringsenhet
ALU
Registers
Control unit IR
PC: 10
Controller BU
Fetch instr.
Decode instr.
Fetch operand
Add reg1 and
value from memory
Execute

19. The result of the addition is written to register reg1
ADD $23,reg1
The result of the addition
is written to register reg1
reg1 +$55 => reg1
Processor
Memory
10: $73 (ADD $23,reg1) …
23: $55
IO units
Exececution unit
ALU
Registers
Control unit IR
PC: 10
Controller BU
Fetch instr.
Decode instr.
Fetch operand
Execute
Save the result in
register reg1
Write result

20. Execution in i five stages
Processor
Memory
10: $73 (ADD $23,reg1) …
23: $55
IO units
Execution unit
ALU
Registers
Control unit IR
PC: 10
Controller BU
Fetch instr.
Decode instr.
Fetch operand
Execute
Write result

21. Von Neumann Limitation
The shared bus between the program memory and data memory leads to the Von Neumann bottleneck.
 Because program memory and data memory cannot be accessed at the same time, throughput is much smaller than the rate at which the CPU can work.
The CPU is continuously forced to wait for needed data to be transferred to or from memory.
For example if we try to read an operand at the same time as we try to read an instruction. This is not possible in the von Neumann architecture since we only have one system bus and cannot address two memory positions simultaneously.
Muhammad Amir Yousaf

22. Other Architectures
Harvard Architecture
Program Memory
CPU
Computer Memory
IOs
Program system Bus
Data system Bus
In the Harvard architecture this is solved by having two separate system buses:
One for instructions
One for data
Data and instructions can be loaded simultaneously, which improves the efficiency.
Means more I/O signals.
More expensive processor.
Uses more power.
Is used internally in modern 32-bit microprocessors and RISC processors.
Muhammad Amir Yousaf

23. Components in a microprocessor system
Processor Types:
CISC (Complex Instruction Set Computer)
Many instructions to facilitate for assembler programmers and complier constructors.
The drawback is that the compiler uses just a few instructions and the construction of a complex processor becomes slow.
It takes a lot of information to describe an instruction.
For example, MC68040 with 200 instructions and 18 modes of addressing.
Assembler: Different instructions are executed with different speed.
Muhammad Amir Yousaf

24. Reduced instruction set computing
Components in a microprocessor system
Reduced instruction set computing
RISC (Reduced Instruction Set Computer)
Simpler instructions (that is used by the compiler).
Gives a faster implementation.
Only one code word to describe an instruction.
For example, Alpha, ARM, PIC, PowerPC, AVR….
Assembler: All instructions take 1 clock cycle.
Muhammad Amir Yousaf

25. Components in a microprocessor system
Memory:
To store data or instructions the computer system uses a so-called primary memory
The executable program code and data is stored in main memory.
The primary memory is divided in two main parts
RAM
ROM
The memory can be seen as a number of post boxes
Muhammad Amir Yousaf

26. Von Neumann Architecture
Microcontrollers
What does a computer system comprise:
Processor (CPU, Central Processing Unit)
Memory
Peripheral units, I/O
System bus, to communicate with peripheral units
If we have a chip that comprise all this it is often called a ‘Micro Controller’
The outer world/ The user
I/O unit
RAM
ROM
Primary Memory
CPU
Muhammad Amir Yousaf

27. Components in a microprocessor system
Processor system bus
Data bus
Communication channel to move data to and from CPU and peripheral units.
Address bus
Used to point out which memory position or IO port that is to be read or written.
Control signals
Used to signal when a data transaction starts and stops.
For example signals if a transaction is a read or write operation.
Muhammad Amir Yousaf

28. Data representation

29. Data Types Text Numbers Integers Others Real data types
Unsigned
Signed
Real data types
Fixed-Point
Floating-Point
Binary-Coded Decimal
Text
ASCII Characters
Strings
Others
Graphics
Images
Video
Audio

30. Numbers are Different!
Computers use binary (not decimal) numbers (0's and 1's).
Requires more digits to represent the same magnitude.
Computers store and process numbers using a fixed number of digits (“fixed-precision”) after Radix point.
Computers represent signed numbers using 2's complement instead of sign-plus-magnitude (not our familiar “sign-plus-magnitude”).

31. Positional Number Systems
Numeric values are represented by a sequence of digit symbols.
Symbols represent numeric values.
Symbols are not limited to ‘0’-’9’!
Each symbol’s contribution to the total value of the number is weighted according to its position in the sequence.
Integers numbers
Fractional numbers

32. Polynomial Evaluation
Whole Numbers (Radix = 10):
= 1     100
With Fractional Part (Radix = 10):
= 3     10-2
General Case (Radix = R):
(S1S0.S-1S-2)R =
S1  R1 + S0  R0 + S-1  R -1 + S-2  R-2

33. Converting Radix R to Decimal
Example R = 8
= 3     8-2 = =
Important: Polynomial evaluation “doesn’t” work if you try to convert in the other direction – I.e., from decimal to something else! Why?

34. Binary to Decimal Conversion
Converting to decimal, so we can use polynomial evaluation:
= 18510
= 127 + 026 + 125 + 124 + 0 22 + 021 + 120 =
= 18510

35. Decimal to Binary Conversion
Converting to binary – can’t use polynomial evaluation!
Whole part and fractional parts must be handled separately!
Whole part: Use repeated division.
Fractional part: Use repeated multiplication.
Combine results when finished.

36. Decimal to Binary Conversion Whole part: Repeated Division
Divide by target radix (2 in this case)
Remainders become digits in the new representation
(0 <= digit < R)
Digits produced in right to left order (LSB to MSB).
Quotient is used as next dividend.
Stop when the quotient becomes less than divisor, but use the corresponding remainder.

37. Decimal to Binary Conversion Whole part: Repeated Division
Convert 9710 to a binary number
 97  2  quotient = 48, remainder = 1 (LSB)
48  2  quotient = 24, remainder = 0.
24  2  quotient = 12, remainder = 0.
12  2  quotient = 6, remainder = 0.
6  2  quotient = 3, remainder = 0.
3  2  quotient = 1, remainder = 1.
1  2  quotient = 0 (Stop) remainder = 1 (MSB)
 Result =

38. Decimal to Binary Conversion Fractional Part: Repeated Multiplication
Multiply by target radix (2 in this case)
Whole part of product becomes digit in the new representation (0 <= digit < R)
Digits produced in left to right order (MSB to LSB)
Fractional part of product is used as next multiplicand.
Stop when the fractional part becomes zero (sometimes it won’t)

39. (How much should we keep?)
Decimal to Binary Conversion (Fractional Part: Repeated Multiplication)
Convert to a binary number
Some fractional numbers have an exact representation in one number system, but not in another!
E.g., 1/3rd has no exact representation in decimal, but does in base 3!
.1  2  0.2 (fractional part = .2, whole part = 0)
.2  2  0.4 (fractional part = .4, whole part = 0)
.4  2  0.8 (fractional part = .8, whole part = 0)
.8  2  1.6 (fractional part = .6, whole part = 1)
.6  2  1.2 (fractional part = .2, whole part = 1)
Result = …..
(How much should we keep?)

40. Counting Principle is the same regardless of radix.
Add 1 to the least significant digit.
If the result is less than R, write it down and copy all the remaining digits on the left.
Otherwise, write down zero and add 1 to the next digit position, etc.
123
+ 1
124
3+1<10
Copy digits to the left
129
+ 1
130
9+1=10
Add 1 to next digit
Write down zero in first position

41. Counting in Binary Dec Binary 0000 1 0001 2 0010 3 0011 4 0100 5 0101
0000 1
0001 2
0010 3
0011 4
0100 5
0101 6
0110 7
0111
Note the pattern!
LSB (bit 0) toggles on every count.
Bit 1 toggles on every second count.
Bit 2 toggles on every fourth count.
Etc….

42. Question:
Do you trust the used car salesman that tells you that the 1966 Mustang he wants to sell you has only the 13,000 miles that it’s odometer shows?
If not, what has happened?
Why?

43. Representation Rollover
Rollover is a consequence of fixed precision.
Computers use fixed precision!
Digits are lost on the left-hand end.
Remaining digits are still correct.
Rollover while counting . . .
Up: “999999”  “000000” (Rn-1  0)
Down: “000000”  “999999” (0  Rn-1 )
The old MUSTANG has probably been running 113,000 miles

44. Rollover in Unsigned Binary
Consider 8 bits used to represent an unsigned integer:
Range:  (0  25510)
Incrementing a value of 255 should yield 256, but this exceeds the range.
Decrementing a value of 0 should yield –1, but this exceeds the range.
Exceeding the range is known as overflow.

45. Rollover is not synonymous with overflow!
Rollover describes a pattern sequence.
Overflow describes an arithmetic behavior.
Whether or not rollover causes overflow depends on how the patterns are interpreted as numeric values!
E.g., In signed two’s complement representation,  corresponds to counting from minus one to zero.
This is rollover, but not overflow
E.g., In signed two’s complement representation,  corresponds to counting from 127 to minus -128
This is overflow, but not rollover

46. Hexadecimal Numbers (Radix = 16)
The number of digit symbols is determined by the radix (e.g., 16)
The value of the digit symbols range from 0 to 15 (0 to R-1).
The symbols are 0-9 followed by A-F.
Conversion between binary and hex is trivial!
Use as a shorthand for binary (significantly fewer digits are required for same magnitude).
Hexadecimal numbers are sometimes indicated using $, e.g. $00FF, or with an index H, e.g. 00FFH
In program languages such as C, the representation 0x is used to indicate a hexadecimal numeric constants and \x may be used for character and string constants.

47. Memorize This! Hex Binary 0000 1 0001 2 0010 3 0011 4 0100 5 0101 6
0000 1
0001 2
0010 3
0011 4
0100 5
0101 6
0110 7
0111
Hex
Binary 8
1000 9
1001 A
1010 B
1011 C
1100 D
1101 E
1110 F
1111

48. Binary to Hex Conversions
Hex digits are in one-to-one correspondence with groups of four binary digits:
A E F
Conversion is a simple table lookup!
Zero-fill on left and right ends to complete the groups!
Works because 16 = 24 (power relationship)

49. Interpretations of Numbers
Signed vs. unsigned is a matter of interpretation; thus a single bit pattern can represent two different values.
Do we need both interpretations?
Why aren't all numbers represented as signed?
Some data (e.g., count, age) can never be negative, and having a greater range is useful.
16710
-8910
unsigned
signed

50. Which is Greater: 1001 or 0011? Answer: It depends!
So how does the computer decide:
“if (x > y)..” /* Is this true or false? */
It’s a matter of interpretation, and depends on how x and y were declared: signed? Or unsigned?
In C/C++ the compiler decides which instruction to use depending on the declaration of the integer.
In assembly language, it is the programmers responsibility to chose the correct instruction.

51. Signed Number Representation
Sign and Magnitude.
First approach was to allocate the MSB to represent sign i.e. 0 for positive and 1 for negative. The remaining bits indicate the magnitude.
Two representations for zero i.e and
Range -127 to 127 for 8 bits.
1’s compliment.
Bitwise NOT applied to number — the "complement" of its positive counterpart.
Two representations for zero i.e and
Addition can be performed as conventional binary addition with adding back resulting carry to the resulting sum e.g. add -1 and +2.

52. Signed Number Representation
2’s Compliment.
Multiple representation of zero and need for taking the carry back made place for the development of another representation system.
2’s compliment of a number is achieved by inverting all bits and add 1 to the result.
Only one zero representation i.e
Range is -128 to 127.
Addition of 2’c compliment numbers are same as addition of unsigned numbers.
Overflow need to be detected.

53. Why Not Sign + Magnitude?+3
0011 +2
0010 +1
0001 +0
0000 -0
1000 -1
1001 -2
1010 -3
1011
The sign is indicated with the most significant bit. A ‘1’ indicates a negative number and a ‘0’ in the MSB bit is indicating a positive number.
Complicates addition :
To add, first check the signs. If they agree, then add the magnitudes and use the same sign; else subtract the smaller from the larger and use the sign of the larger.
How do you determine which is smaller/larger?
Complicates comparators:
Two zeroes!

54. Why Not Sign + Magnitude?9 3 + 12
1001 + -1 +3
- 4
0011
Hardware Adder
Wrong!
Right!
1100

55. Why 2’s Complement?
Just as easy to determine sign as when bits are representing in sign + magnitude.
Addition can be performed without worrying about which operand is larger.
A single zero!.
One hardware adder works for both signed and unsigned operands. +3
0011 +2
0010 +1
0001
0000 -1
1111 -2
1110 -3
1101 -4
1100

56. One Hardware Adder Should Handle Both (signed and unsigned)
0011
Hardware Adder
1100
1001
Manipulates bit patterns, not numbers! 9 3 + 12 + -7 +3
- 4

57. Changing the Sign +4 = 0100 -4 = 1100 Sign+Magnitude: 2’s Complement:
-4 = 1100
Sign+Magnitude:
2’s Complement:
+4 =
-4 = 1100
Invert
Increment
Change 1 bit

58. Representation Width Be Careful!
For the algorithm to work you need to use the complete representation
Wrong: +25 =   = +7
Right: =   = -25
Expand to 8-bits
If positive: Add leading 0’s If negative: Add leading 1’s
Apply algorithm
+25 = 11001=

59. Subtraction Is Easy! B=0100=4 Just a bunch of exclusive-OR gates! A
Result
B XOR Ctrl
B = 0100 if C=0
B = 1011 if C=1
A+(B + Ctrl)
B = 1100=-B if C=1
Adder
Controlled
Inverter
Just a bunch of exclusive-OR gates! A
0 = add (A+B)
Ctrl
1 = sub (A-B)
X Y X xor Y

60. Range of Unsigned Integers
Each of ‘n’ bits can have one of two values.
Total # of patterns of n bits = 2 2 2… 2
=>‘n’ 2’s
=> 2n
If n-bits are used to represent an unsigned integer value:
Range: 0 to 2n-1 (2n different values)

61. Range of Signed Integers
Half of the 2n patterns will be used for positive values, and half for negative.
Half is 2n-1 since each position has a value which is two times higher than the position to the right.
Positive Range: 0 to 2n (2n-1 patterns)
Negative Range: -2n-1 to -1 (2n-1 patterns)
8 bits (n = 8): -27 (-128) to (+127)

62. Unsigned Overflow Value of lost bit is 2n (16). 16 + 3 = 19
(The right answer!)
1100 (12)
( 7)
10011
Lost
0011 ( 3) Wrong
(Result limited by word size)
We only have four bits

63. Rollover occur in the middle of the range for 2-comp
Signed Overflow
Overflow is impossible  when adding (subtracting) numbers that have different (same) signs.
Overflow occurs when the magnitude of the result extends into the sign bit position:
 (0)
This is not rollover!
Rollover occur in the middle of the range for 2-comp

64. Signed Overflow 
sum:
(keep 8 bits)
(+11910) wrong
Note: 119 – 28 = 119 – 256 = -137

65. References Lecture slides: Benny Thörnberg, Mattias O’ Nils
Video Lecture: Prof. Anshul Kumar
Webopedia
Muhammad Amir Yousaf