Simulation of Switching Converters

Name: Simulation of Switching Converters
Uploaded: 2017-11-04T21:05:57+00:00
Duration: PTM38S36
Channel: Holly Simpson
Description: Simulation of Switching Converters

Simulation of Switching Converters
Chapter 9 Simulation of Switching Converters

Simulation of switching converters
Overview PSpice PSpice Simulations using .CIR PSpice Simulations using schematics entry PSpice Simulations Using Behavioral Modeling PSpice simulations using vendor models Small-signal analysis of switching converters Creating capture symbols for PSpice simulation Solving convergence problems Matlab Simulink Power switching converters Simulation of switching converters

PSpice Simulations using .CIR
An Ideal Open-Loop Buck Converter Open-loop buck converter simulation * SWITCHING FREQUENCY = 1 KHZ ; DUTY CYCLE = 50% VPWM 1 0 PULSE( US 1US 0.5MS 1MS) * PULSE PWM SOURCE: PULSED VOLTAGE = 10 V, RISE TIME = 1 US, * FALL TIME = 1 US, PULSE WIDTH = 500 US, PERIOD = 1 MS. L M C U RL 2 0 5 .TRAN 50US 20MS .OPTION ITL5=0 .PROBE .END Power switching converters Simulation of switching converters

An Ideal Open-Loop Buck Converter Power switching converters Simulation of switching converters

An Ideal Open-Loop Buck Converter L = 50 mH Power switching converters Simulation of switching converters

An Ideal Open-Loop Buck Converter L = 5 mH Power switching converters Simulation of switching converters

An Ideal Open-Loop Buck Converter L = 1.25 mH Power switching converters Simulation of switching converters

An Ideal Open-Loop Buck Converter L = 10 mH and C = 500 uF Power switching converters Simulation of switching converters

An Ideal Open-Loop Buck Converter L = 1.25 mH and C = 500 uF Power switching converters Simulation of switching converters

Voltage-controlled switch S<name> N+ N- NC+ NC- SNAME .MODEL SNAME VSWITCH (RON=0.01 ROFF=1E+7 VON=0.7 VOFF=0) Power switching converters Simulation of switching converters

Current-controlled switch W<name> N+ N- VN WNAME .MODEL WNAME ISWITCH (RON=0.01 ROFF=1E+7 ION=0.1 IOFF=0) Power switching converters Simulation of switching converters

Buck Converter with an Ideal Switch OPEN-LOOP BUCK CONVERTER WITH AN IDEAL SWITCH * SWITCHING FREQUENCY = 1 KHZ ; DUTY CYCLE = 50% VS VPWM PULSE( US 1US 500US 1MS) S SX RSX G DFW 0 2 D1 L M C U RL 3 0 5 .MODEL SX VSWITCH (RON=0.01 ROFF=1E+7 VON=1 VOFF=0) .MODEL D1 D .TRAN 0.05MS 20MS .PROBE .END Power switching converters Simulation of switching converters

Buck Converter with an Ideal Switch Power switching converters Simulation of switching converters

Using Initial Conditions IC L U IC=1 C0 3 0 IC=5 .TRAN 2NS 200NS UIC Power switching converters Simulation of switching converters

PSpice Simulations using schematics entry
Boost converter Power switching converters Simulation of switching converters

PSpice Simulations using schematics entry
Power switching converters Simulation of switching converters

PSpice Simulations Using Behavioral Modeling
ABM.OLB part library Control system parts Power switching converters Simulation of switching converters

Control system parts Power switching converters Simulation of switching converters

PSpice-equivalent parts

Operators in ABM expressions

Functions in arithmetic expressions

Examples of ABM blocks use
ABM and PARAM Power switching converters Simulation of switching converters

Node voltages can be accessed from ABM blocks Power switching converters Simulation of switching converters

RMS meter If(argument,then,else) If (TIME<=0, 0, SQRT(SDT(PWR(V(%IN),2))/TIME)) Power switching converters Simulation of switching converters

PWM modulator Power switching converters Simulation of switching converters

VCO implementation with ABM1 Power switching converters Simulation of switching converters

PSpice Simulations Using Control Blocks
PWM modulator with control blocks Power switching converters Simulation of switching converters

Model of an operational amplifier Power switching converters Simulation of switching converters

Open loop frequency response Power switching converters Simulation of switching converters

Closed loop amplifier Power switching converters Simulation of switching converters

Closed loop frequency response Power switching converters Simulation of switching converters

Voltage –mode PWM boost converter

PSpice simulations using vendor models
.TRAN 0 30m 0 0.1u .OPTIONS STEPGMIN .OPTIONS ABSTOL= 10p .OPTIONS ITL1= 400 .OPTIONS ITL4= 500 .OPTIONS RELTOL= 0.01 .OPTIONS VNTOL= 10u Power switching converters Simulation of switching converters

PSpice simulations using vendor models

Vorperian models for PSpice

Vorperian models for PSpice
**** VMSSCCM **** * Small signal continuous conduction voltage mode model * Params: RMPHITE --> External ramp height * D > Duty cycle * Ic > Current flowing from terminal C * Vap > Voltage across terminal A P * Rsw > Switch on resistance * Rd > diode on resistance * Rm > which models the base storage effects * Re > models ripple across esr of cap * Pins control voltage -- * common | * passive | | * active -- | | | .subckt VMSSCCM A P C VC Params: RMPHITE=2 D=0.4 IC=1 VAP=20 Rsw=1e-6 Rd=1e-6 Re=1e-6 Rm=1e-6 efm 4 0 value ={v(Vc)/rmphite} e2 A 6 value={v(0,4)*Vap/d} g1 A P value={v(4)*IC} gxfr 6 P VALUE={I(vms)*D} exfr 9 P VALUE={V(6,P)*D} vms rd 8 C {d*rd+(1-d)*rsw+d*(1-d)*re+rm} rope 4 0 1g rgnd 0 P 1g .ends Power switching converters Simulation of switching converters

Small-signal analysis of switching converters
Small-signal AC analysis Power switching converters Simulation of switching converters

Open-loop transfer function Power switching converters Simulation of switching converters

Input impedance Power switching converters Simulation of switching converters

Output impedance Power switching converters Simulation of switching converters

Small-signal transient analysis Power switching converters Simulation of switching converters

Averaged-inductor model for a voltage-mode boost converter

Output voltage obtained with the averaged-inductor model

Measuring the loop gain

Frequency compensation
choose f1 = 100 Hz for a switching frequency of 1 kHz PID compensation Power switching converters Simulation of switching converters

PID compensation Mag_comp_f1 = Ph_comp = 32 k1_db = k1 = k2_db = k2 = R2 = R3 = C1 = e-005 C2 = e-006 C3 = e-006 Power switching converters Simulation of switching converters

Boost switching converter with PID compensator

Simulation results with a PID compensator

PI compensation Small-signal model of the boost converter with PI compensation Power switching converters Simulation of switching converters

PI compensation Power switching converters Simulation of switching converters

PI compensation using ABM blocks

Simulation results of the PI compensation using ABM blocks

PI compensation using vendor models

Simulation results of the PI compensation using vendor models

PI compensation using vendor models
*Analysis directives: .TRAN 0 30m 0 10n SKIPBP .OPTIONS STEPGMIN .OPTIONS PREORDER .OPTIONS ABSTOL= 10.0p .OPTIONS CHGTOL= 0.1p .OPTIONS ITL2= 200 .OPTIONS ITL4= 400 .OPTIONS RELTOL= 0.01 .OPTIONS VNTOL= 10.0u I/O ERROR -- Probe file size exceeds JOB ABORTED TOTAL JOB TIME Power switching converters Simulation of switching converters

Creating capture symbols for PSpice simulation
Vendors often provide PSpice models for their circuit components. They are normally provided in a text file with extension .LIB; if the file has a different extension, it should be changed to .LIB Start the PSpice Model Editor and from the File menu, choose Create Parts Browse to find the input model library (.LIB file) and click OK to start This step creates an .OBL file with a schematic symbol linked to your model To place the new part into the schematic, open Capture, and from the Place menu choose Part. Click Add library, then find and add the new “.OLB” file Power switching converters Simulation of switching converters

Solving convergence problems
PSpice uses the Newton-Raphson algorithm to solve the nonlinear equations in these analyses The algorithm is guaranteed to converge only if the analysis is started close to the solution If the initial guess is far away from the solution, this may cause a convergence failure or even a false convergence If the node voltages do not settle down within a certain number of iterations, an error message will be issued Power switching converters Simulation of switching converters

DC analysis error messages
The DC Analysis calculates the small-signal bias points before starting the AC analysis or the initial transient solution for the transient analysis Solutions to the DC analysis may fail to converge because of incorrect initial voltage guesses, model discontinuities, unstable or bistable operation, or unrealistic circuit impedances When an error is found during the DC analysis, SPICE will then terminate the run because both the AC and transient analyses require an initial stable operating point in order to start Power switching converters Simulation of switching converters

DC analysis error messages
No convergence in DC analysis PIVTOL Error Singular Matrix Gmin/Source Stepping Failed No Convergence in DC analysis at Step = xxx Power switching converters Simulation of switching converters

Transient analysis error messages
If the node voltages do not settle down, the time step is reduced and SPICE tries again to determine the node voltages If the time step is reduced beyond a certain fraction of the total analysis time, the transient analysis will issue an error message “Time step too small” and the analysis will be halted Transient analysis failures are usually due to model discontinuities or unrealistic circuit, source, or parasitic modeling Power switching converters Simulation of switching converters

Solutions to convergence problems
There are two ways to solve convergence problems the first only tries to fix the symptoms by adjusting the simulator options while the other attacks the root cause of the convergence problems Once the circuit is properly modeled, many of the modifications of the "options" parameters will no longer be required It should be noted that solutions involving simulation options may simply mask the underlying circuit instabilities Power switching converters Simulation of switching converters

Bias point (DC) convergence
Checking circuit topology and connectivity Modeling of circuit components PSpice options are checked to ensure that they are properly defined Power switching converters Simulation of switching converters

Checking circuit topology and connectivity
Make sure that all of the circuit connections are valid Check for incorrect node numbering or dangling nodes Verify component polarity Check for syntax mistakes Make sure that the correct PSpice units (i.e. MEG for 1E6, not M, which means mili in simulations) are used Power switching converters Simulation of switching converters

Make sure that there is a DC path from every node to ground Make sure that there are at least two connections at every node Make sure that capacitors and/or current sources are not connected in series Make sure that no (groups of) nodes are isolated from ground by current sources and/or capacitors Make sure that there are no loops of inductors and/or voltage sources only Power switching converters Simulation of switching converters

Place the ground (node 0) somewhere in the circuit Be careful when floating grounds (e.g., chassis ground) are used; a large resistor should be connected from the floating node to ground. All nodes will be reported as floating if "0 ground" is not used Make sure that voltage/current generators use realistic values, and verify that the syntax is correct Make sure that dependent source gains are correct, and that E/G element expressions are reasonable Power switching converters Simulation of switching converters

Verify that division by zero or LOG(0) cannot occur Voltages and currents in PSpice are limited to the range +/- 1e10 Avoid using digital components, unless really necessary Initialize the digital nodes with valid digital values Avoid situations where an ideal current source delivers current into a reverse-biased p-n junction without a shunt resistance Power switching converters Simulation of switching converters

Setting up the options for the analog simulation
Increase ITL1 to 400 Use NODESETs to set node voltages to the nearest reasonable guess at their DC values Enable the GMIN stepping algorithm Set PREORDER in Simulation Profiles options Setting the value of ABSTOL to 1 µ PSpice does not always converge when relaxed tolerances are used Setting GMIN to a value between 1n and 10n will often solve convergence problems Setting GMIN to a value, which is greater than 10n, may cause convergence problems Power switching converters Simulation of switching converters

Transient convergence
The transient analysis can fail to complete if the time step becomes too small This can be due to either (a) the Newton-Raphson iterations would not converge even for the smallest time step size (b) something in the circuit is moving faster than can be accommodated by the minimum step size Power switching converters Simulation of switching converters

Transient convergence
The circuit topology and connectivity should first be checked Followed by the PSpice options Power switching converters Simulation of switching converters

Circuit topology and connectivity
Avoid using digital components, unless really necessary Initialize the nodes with valid digital value to ensure there are no ambiguous states Use RC snubbers around diodes Add Capacitance for all semiconductor junctions Power switching converters Simulation of switching converters

Add realistic circuit and element parasitics It is important that switching times be nonzero It is recommended that all inductors have a parallel resistor Look for waveforms that transition vertically (up or down) at the point during which the analysis halts Power switching converters Simulation of switching converters

Increase the rise/fall times of the PULSE sources Ensure that there is no unreasonably large capacitor or inductor Power switching converters Simulation of switching converters

PSpice options Set RELTOL=.01 Reduce the accuracy of ABSTOL/VNTOL if current/voltage levels allow it ABSTOL and VNTOL should be set to about 8 orders of magnitude below the level of the maximum voltage and current Increase ITL4, but no more than 100 Power switching converters Simulation of switching converters

PSpice options Skipping the bias point is not recommended Any applicable .IC and IC= initial conditions statements should be added to assist in the initial stages of the transient analysis Power switching converters Simulation of switching converters

Switching converter simulation using Matlab
Working with transfer functions Consider a buck converter designed to operate in the continuous conduction mode having the following parameters: R = 4Ω, L = mH, C = 94 µf, Vs = 42 V, Va = 12 V Power switching converters Simulation of switching converters

% this is a comment % parameters R= 4; L = e-3; Rind = 100 e-3; C = 94 e-6; Resr = 10 e-3 Vs = 42; Va = 12; D=Va/Vs; Kd= Vs/(1-D)^2; Sz1=1/(Resr*C); Req = R-(Resr*R/(Resr+R)); Sz2 = (1/L)*(1-D)^2* Req – Rind/L; Re=(Resr*R)/( Resr+R); Wo = (1/sqrt(L*C)) * sqrt((Rind+re*D*(1-D))/(Resr+R)); Q = Wo/(((Rind+re*(1-D))/L)+(1/(C*(Resr+R)))); Power switching converters Simulation of switching converters

% polynomials are entered in descending order of S. n1=[1/Sz1 1] n2=[-1/Sz2 1] NUM=conv(n1,n2) % the convolution realizes the product of 2 polynomials % define denumerator DEN = [1/(Wo^2) 1/(Wo*Q) 1] % create TF variable sysTF = Kd * tf(NUM,DEN) which returns Transfer function: Power switching converters Simulation of switching converters

The location of the poles can be found using poles = roots(DEN) and the frequency response can be plotted using bode(sysTF) Power switching converters Simulation of switching converters

The small signal transient step response can be plotted using Figure % this command opens a new figure window step(sysTF) Power switching converters Simulation of switching converters

Working with matrices Consider a buck converter designed to operate in the continuous conduction mode having the following parameters: R = 4Ω, L = mH, C = 94 µf, Vs = 42 V, Va = 12 V. % state-space averaged model of a Buck converter Rload= 4; % load resistance L= 1.330e-3; % inductance cap=94.e-6; % capacitance Ts=1.e-4; % switching period Vs=42; % input DC voltage Vref=12; % desired output voltage The average duty cycle is: D=Vref/(Vs); % ideal duty cycle Power switching converters Simulation of switching converters

A=[ /L 1/cap -1/(Rload*cap)] B1=[ 1/L 0]; %during Ton B2=[ 0 0]; %during Toff B=B1*D+B2*(1-D) C=[0 1]; Power switching converters Simulation of switching converters

OLpoles = eig(A) sysOL=ss(A,B,C,0) step(sysOL) Power switching converters Simulation of switching converters

gamma=[ Vs/L 0]; closed-loop poles: P=1e3*[ i i]'; Bf= gamma*(D/Vref); F=place(A,Bf ,P) Power switching converters Simulation of switching converters

Switching converter simulation using Simulink
[NUM,DEN] = TFDATA(sysTF,’v’) Power switching converters Simulation of switching converters

sysZPK = zpk(sysTF) zeroes: [ e ] poles: [ ] gain: [ ] Power switching converters Simulation of switching converters

Simulation of Switching Converters

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