1. Critical Design Review 27 February 2007 Black Box Car System (BBCS) ctrl + z: Benjamin Baker, Lisa Furnish, Chris Klepac, Benjamin Mauser, Zachary Miers

2. Project Overview Recording visual data outside of car Recording visual data outside of car Data constantly stored in RAM Data constantly stored in RAM When a crash is detected, data is written from RAM to more permanent Flash storage When a crash is detected, data is written from RAM to more permanent Flash storage User is able to video of events leading up to crash on personal computer User is able to video of events leading up to crash on personal computer

3. Initial Setbacks Cannot use PSRAM Cannot use PSRAM ARM9 ARM9 Code space Code space Learning curve (software) Learning curve (software) Routing data from camera to RAM Routing data from camera to RAM

4. System Block Diagram Black Box Accelerometer Reset Storage User Interface Camera PC Interface

5. Black Box Block Diagram STR9 Microcontroller Power LED/LCD Computer Flash Storage RAMCamera Accelerometer FPGA

6. Hardware: Microcontroller STR9 STR9 Working with STR910-EVAL and STR912 development boards Working with STR910-EVAL and STR912 development boards Take input from accelerometer and reset Take input from accelerometer and reset Communicate with FPGA via GPIO Communicate with FPGA via GPIO

7. Microcontroller Schematic

8. ARM Programming Block Run bootup code Receive I2C input from accelerometer Transfer I2C data to register Monitor register for 4G reading Toggle GPIO high— tell FPGA accident has occurred Stop receiving input

9. Hardware: Camera ST VS6524 ST VS6524 Using x24 development board Using x24 development board 320 x 240 320 x 240 8 frames per second 8 frames per second RGB 565 RGB 565 Focal length of 30mm to infinity Focal length of 30mm to infinity

10. Camera HSYNC

11. Camera Data Transmission

12. Camera Image Size Memory: 2^20[addresses] * 16[bits/address] * 2 [memory chips] = 33554432 bits Image: 320(width) * 240[height] * 16 [bits/pixel] = 1228800 bits Storage amount: Memory / Image [# of frames] = 27.3067 frames Length of recording time: 27 frames * (1 / 8 [frames per second]) = 3.375 seconds

13. Camera Schematic 8 data lines (output) 8 data lines (output) HSYNC (output) HSYNC (output) VSYNC (output) VSYNC (output) CLK (input) CLK (input) PCLK (output) PCLK (output) SDA & SLC (I2C) SDA & SLC (I2C)

14. Hardware: Accelerometer ST LIS3LV02DQ ST LIS3LV02DQ Working with EK3LV02DQ (ST) development board Working with EK3LV02DQ (ST) development board Will communicate with processor via I2C Will communicate with processor via I2C 4G will trigger data storage 4G will trigger data storage

15. Accelerometer I 2 C Interface Using I2C to interface directly with the microcontroller Using I2C to interface directly with the microcontroller Tie the CS pin high to select I2C instead of SPI Tie the CS pin high to select I2C instead of SPI LIS3LV02DQ is an I2C slave LIS3LV02DQ is an I2C slave 2 lines of interest with I2C bus; Serial Clock Line (SCL) and Serial DAta Line (SDA) 2 lines of interest with I2C bus; Serial Clock Line (SCL) and Serial DAta Line (SDA) SDA is bidirectional SDA is bidirectional Both lines have built in pull up resistors Both lines have built in pull up resistors

16. Accelerometer Schematic

17. Hardware: Memory Cypress CY7C1061AV33 Cypress CY7C1061AV33 1M x 16 SRAM 1M x 16 SRAM Asynchronous Asynchronous 2 chips 2 chips Implement circular buffer Implement circular buffer Will store 27 frames Will store 27 frames At 8 frames per second this will be 3.37 seconds of video

18. Memory Chip Select

19. Memory Block Diagram

20. Memory Timing Diagram Write

21. Memory Timing Diagram Read

22. Memory Outputs and Inputs 5 Vcc inputs (high) 5 Vcc inputs (high) 5 Vss inputs (low) 5 Vss inputs (low) BHE-bar (low) BHE-bar (low) BLE-bar (low) BLE-bar (low) DNU (do not use) DNU (do not use) NC (not connected) NC (not connected) 20 address lines (input) 20 address lines (input) 16 parallel data lines (input / output) 16 parallel data lines (input / output) CE1 (input) CE1 (input) CE2 (input) CE2 (input) WE (input) WE (input) OE (input) OE (input)

23. Memory Schematic

24. Hardware: Flash Memory Secure Digital flash memory card Secure Digital flash memory card Breakout Board for DOSonCHIP FAT16 FAT32 Module Breakout Board for DOSonCHIP FAT16 FAT32 Module Write to DOSonCHIP using UART from FPGA Write to DOSonCHIP using UART from FPGA

25. Flash Memory Information UART UART SPI (Not Using) SPI (Not Using) Two will be used Two will be used Accelerometer data Accelerometer data Long term storage of video Long term storage of video Baud rates: Baud rates: 1200, 2400, 9600, 28800, 38400, 57600, 115200, 230400 [bps] 1200, 2400, 9600, 28800, 38400, 57600, 115200, 230400 [bps] UART_TX UART_TX UART_RX UART_RX UART_RTS UART_RTS UART_CTS UART_CTS At 115200 [bps] transfer of video will take 4:48 [min:sec] At 115200 [bps] transfer of video will take 4:48 [min:sec]

26. Flash Memory Schematic

27. Hardware Power Requirements: Camera: 2.8V @ <50mA Camera: 2.8V @ <50mA ARM9: 3.3V @ 200mA Max (I/O’s) and a 1.8V Core supply @ <20mA ARM9: 3.3V @ 200mA Max (I/O’s) and a 1.8V Core supply @ <20mA SRAM: 2.8V @ <35mA total SRAM: 2.8V @ <35mA total Xilinx Spartan 3: 5V @ 2.5A max (should be well under 1A for our application). Xilinx Spartan 3: 5V @ 2.5A max (should be well under 1A for our application).

28. Power Supply Block Diagram Car Battery(8V- 16V) 5V-4A Converter 3.3V 300mA Max LDO Linear Regulator CPU I/O’s 2.8V 200mA Max LDO Linear Regulator Camera Digital and Analog Supply’s SRAM Supply 1.8V 100mA Max LDO Linear Regulator CPU Core Xilinx Spartan 3 PCB External 12V Backup Battery

29. The result for a 5V-4A Supply:

30. LDO Linear Regulators: 3.3V Supply: STMicroelectronics LD1117 can supply up to 1A with a dropout voltage of 1.15V. 3.3V Supply: STMicroelectronics LD1117 can supply up to 1A with a dropout voltage of 1.15V. 2.8V and 1.8V Supply: STMicroelectronics LK112 can supply up to 200mA with a dropout voltage of 0.35V. 2.8V and 1.8V Supply: STMicroelectronics LK112 can supply up to 200mA with a dropout voltage of 0.35V.

31. Supply Locations: 5V-4A Switching converter on eval board. Run power wires to the other PCB’s. 5V-4A Switching converter on eval board. Run power wires to the other PCB’s. LDO Linear regulators on the PCB’s where required. LDO Linear regulators on the PCB’s where required.

32. Power supply backup: 12V battery that cuts in when the main supply fails. 12V battery that cuts in when the main supply fails. The only time the backup supply is needed is when an accident actually occurs. The only time the backup supply is needed is when an accident actually occurs.

33. Supply Transients, Load dump, and mutual coupling. Could safeguard all of these but we only really need transient protection and supply reverse polarity protection. Could safeguard all of these but we only really need transient protection and supply reverse polarity protection.

34. Hardware: FPGA Digilent XC3S200 Spartan-3 development board Digilent XC3S200 Spartan-3 development board Will route data from camera to RAM via I/O lines Will route data from camera to RAM via I/O lines Store entire frame on development board, then move entire frame from FPGA SRAM to our large SRAM Store entire frame on development board, then move entire frame from FPGA SRAM to our large SRAM Move images from SRAM to flash memory Move images from SRAM to flash memory

35. FPGA I/O pin Layout

36. FPGA Programming Block Diagram Video input Single frame storage Transfer from single frame to multiple frame storage Pointer to Write Location (Addressing of multiple frame storage) Interrupt to stop video Image header information Multiple frame storage Pointer to Start Frame (Addressing of multiple frame read) Video output to flash memory Multiple Frame Dump Video Capture Multiple Frame Storage Interrupt Sequence Long Term Storage

37. Milestone Deliverables Milestone 1: Milestone 1: PCB design and BOM v0.1 PCB design and BOM v0.1 Formatting for Bitmap images Formatting for Bitmap images Send data to RAM Send data to RAM Write to Flash via PC Write to Flash via PC Main Power PCB Main Power PCB Milestone 2: Milestone 2: PCB v0.1 fabricated and populated PCB v0.1 fabricated and populated Camera data to RAM Camera data to RAM Write to Flash via FPGA Write to Flash via FPGA ARM9 communication (I 2 C and FPGA) ARM9 communication (I 2 C and FPGA) On-board user interface On-board user interface

38. Timeline

39. Questions ?