1. + CS 325: CS Hardware and Software Organization and Architecture Exam 1: Study Guide

2. + Computer Architecture and Organization Computer Architecture Attributes of the computer that are visible to the programmer. Instruction set Techniques for addressing memory Computer Organization Hardware details transparent to the programmer Control signals Bus interfaces Memory type

3. + Basic Structure of Computers

4. +  CPU – controls the operation of the computer and performs its data processing functions  Main Memory – stores data  I/O – moves data between the computer and its external environment  System Interconnection – some mechanism that provides for communication among CPU, main memory, and I/O There are four main structural components of the computer:

5. + Number Systems Number Representation Decimal Binary Hexadecimal Decimal vs. Hexadecimal vs. Binary Number Conversions Dec  Bin, Dec  Hex Bin  Dec, Bin  Hex Hex  Dec, Hex  Bin

6. + Decimal Numbers: Base 10 Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Example: 4923 = (4x10 3 ) + (9x10 2 ) + (2x10 1 ) + (3x10 0 )

7. + Binary Numbers: Base 2 Digits: 0, 1 Example: 101011= (1x2 5 ) + (0x2 4 ) + (1x2 3 ) + (0x2 2 ) + (1x2 1 ) + (1x2 0 ) = 43 10 What about a base that converts to binary easily? 32168421 2525 2424 23232 2121 2020 101011

8. + Hexadecimal Numbers: Base 16 Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F Decimal digits + A – F Example: 12E = (1x16 2 ) + (2x16 1 ) + (Ex16 0 ) = 302 10 ABCDEF 101112131415

9. + Decimal vs. Hexadecimal vs. Binary DECHEXBIN 000000 110001 220010 330011 440100 550101 660110 770111 881000 991001 10A1010 11B1011 12C1100 13D1101 14E1110 15F1111 DECHEXBIN 16100001 0000 17110001 18120001 0010 19130001 0011 20140001 0100 21150001 0101 22160001 0110 23170001 0111 24180001 1000 25190001 1001 261A0001 1010 271B0001 1011 281C0001 1100 291D0001 1101 301E0001 1110 311F0001 1111

10. + Number Conversion: Dec  Bin Converting from base 10 to base 2: Continue dividing decimal number by 2 and keep the remainder Example: 35 10 100011 2 35/2171LSB 17/281 8/240 4/220 2/210 1/201MSB

11. + Number Conversion: Dec  Hex Converting from base 10 to base 16: Example:35 10 23 16 35/1623LSB 2/1602MSB

12. + Number Conversion: Bin  Dec Converting from base 2 to base 10: Example: 11010 2 (1x2 4 ) + (1x2 3 ) + (0x2 2 ) + (1x2 1 ) + (0x2 0 ) 16 + 8 + 0 + 2 + 0 = 26 10 168421 11010 MSBLSB

13. + Number Conversion: Bin  Hex Converting from base 2 to base 16: Example: 11010110 2 1 Hex digit represents 16 Decimal values 4 Binary digits represent 16 Decimal values 1 Hex digit replaces 4 Binary digits D6 16 11010110 13  D6

14. + Number Conversion: Hex  Dec Converting from base 16 to base 10: Example: 8E3 16 (8x16 2 ) + (Ex16 1 ) + (3x16 0 ) 2048 + 224 + 3 = 2275 10

15. + Number Conversion: Hex  Bin Converting from base 16 to base 2: Example: 9A2E 16 1001101000101110 2 91001MSB A1010 20010 E1110LSB

16. + The Transistor A controlled switch. Collector – positive lead Emitter – negative lead Base – control lead A binary “1” represents an active transistor.

17. + Representing Signed Numbers 3 ways for handling negative numbers Sign and Magnitude 1’s Complement 2’s Complement

18. + Sign and Magnitude Easiest solution: Define leftmost bit to be the sign bit. 0  positive number, 1  negative number Other bits represent numerical value of number 32-bit example: 0000 0000 0000 0000 0000 0000 0000 0001  +1 10 1000 0000 0000 0000 0000 0000 0000 0001  -1 10

19. + Convert Decimal to Sign and Magnitude: S&N requires two things: Sign: 0  positive, 1  negative Magnitude: value to be represented 16-bit Example: +74 10 0000 0000 0100 1010 16-bit Example: -74 10 1000 0000 0100 1010

20. + Convert Sign and Magnitude to Decimal: 8-bit Example: 1000 0111 2, -7 10 Another Example: 1000 0000 2 0000 0000 2 Produces: -0 and +0 problems with this?

21. + 1’s Complement 4-bit Example: 1’s comp representation of a 4 bit number 2 n-1 -1 positive numbers 2 n-1 -1 negative numbers PosNeg 000001111 100011110 200101101 300111100 401001011 501011010 601101001 701111000

22. + Converting Decimal to 1’s Comp Example 8-bit: -48 10 First, convert to Binary 8-bits: 0011 0000 2 Next, compliment the bits: 1100 1111 2

23. + Converting 1’s Comp to Decimal Example 8-bit: 1101 1110 2 MSB is 1 so compliment the bits: 0010 0001 2 Next, convert to Base 10: 33 10 Since the MSB is 1, the Base 10 value is negative: -33 10

24. + 2’s Complement Number Line 2 N-1 -1 Pos Nums 2 N-1 Neg Nums 1 zero Must specify width 8-bits, 16-bits, 32-bits Overflow? More on this later

25. + 2’s Complement 2 4 bits 2’s CompDecimal 01117 01106 01015 01004 00113 00102 00011 00000 1111 1110-2 1101-3 1100-4 1011-5 1010-6 1001-7 1000-8

26. + Converting Decimal to 2’s Comp Example 8-bit: -27 10 First, convert to Binary 8-bits: 0001 1011 2 Next, 1s comp: 1110 0100 2 Add 1 to 1s comp value: 1110 0100 2 +0000 0001 2 1110 0101 2

27. + Converting from 2s Comp to Decimal Algorithm for Converting 2s Comp to Decimal: If the MSB is 1, perform 1s comp and add 1. If the MSB is 0, go to next step. Convert the result to Base 10. This value should be positive. If the MSB was 1, add the negative sign to the Base 10 number.

28. + Converting 2’s Comp to Decimal Example 8-bit: 1010 1010 2 MSB is 1 so compliment the bits: 0101 0101 2 And add 1: 0101 0101 2 +0000 0001 2 0101 0110 2 Since the MSB is 1, the Base 10 value is negative: -86 10

29. + 2’s Comp Overflow Rules for detecting 2s Comp overflow: If the sum of two Pos numbers yields a Neg result, the sum has overflowed. If the sum of two Neg numbers yields a Pos result, the sum has overflowed. Otherwise, the sum has not overflowed.

30. + 2’s Comp Overflow Examples -39 + 92 = 53 1 1 1 1 1 1 0 1 1 0 1 1 +0 1 0 1 1 1 0 0 0 0 1 1 0 1 0 1 Carryout without overflow. Sum is correct

31. + 2’s Complement Binary Subtraction Example: Subtract 7 from 2 (2 – 7): Convert to 4-bit 2s comp: 7  0111 2  0010 Perform 2s comp on 7: 0111  1001 Now add: 0 0 1 0 +1 0 0 1 1 0 1 1 The value 1011 represented in 2’s comp converts to -5 10

32. + Unsigned Binary Multiplication Quite Easy. Rules to remember: 0 * 1 = 0 1 * 1 = 1 Same as logical “and” operation Multiplying an m-bit number by and n-bit number results in an n+m-bit number. This n+m-bit width ensures overflow cannot occur. Simple Example: m = n = 2 2x3 = 6 10 2 x 11 2 = 110 2 Largest 2-bit value: 11 or 3 10 11 2 x 11 2 = 1001 2 or 9 10

33. + Unsigned Binary Multiplication Example: 1 0 1 0 x0 1 1 0 0 0 0 0 1 0 1 0 +0 0 0 0______ 0 1 1 1 1 0 0

34. + 2’s Complement Binary Multiplication Still Easy: Only difference between 2’s comp multiply and unsigned multiply: Sign extend both values to twice as many bits. Ex: 1 1 0 0  1 1 1 1 1 1 0 0 x0 1 0 1  x0 0 0 0 0 1 0 0 The result will be stored in m+n least significant bits.

35. + 2’s Complement Binary Multiplication – Booth’s Algorithm Multiplication by bit shifting and addition. Removes the need for multiply circuit Requires: A way to compute 2’s Complement Available as fast hardware instructions X86 assembly instruction: NEG A way to compare two values for equality How to do this quickly? Exclusive Not OR (NXOR) Gate Compare all sequential bits of bit string A and bit string B. Values are equal if the comparison process produces all 1s. A way to shift bit strings. Arithmetic bit shift, which preserves the sign bit when shifting to the right. 10110110  arithmetic shift right  11011011 x86 assembly instruction: SAR ABA NXOR B 001 010 100 111

36. + 2’s Complement Binary Multiplication – Booth’s Algorithm If the LSB of X is 1, and X-1 is 0, we subtract Y from U. If LSB of X is 0, and X-1 is 1, then we add Y to U. If both LSB of X and X-1 are equal, do nothing and skip to shifting stage.

37. + 2’s Complement Binary Multiplication – Booth’s Algorithm UVXX-1 0: 0000 0000 1100 0 1: 0000 0000 0110 0 2: 0000 0000 0011 0 +1001 1001 3: 1100 1000 1001 1 4: 1110 0100 1100 1 Result of 7 x -4: UV 11100100  00011100  -28 10

38. + Sign Extension Convert 2’s comp number using N bits to more than N bits (int to long int): Replicate the MSB (sign bit) of the smaller number to fill new bits. 2’s comp positive number has infinite 0s 2’s comp negative number has infinite 1s Ex: 16bit -4 10 to 32-bit: 1111 1111 1111 1100 1111 1111 1111 1111 1111 1111 1111 1100

39. + Combinational Logic Translates a set of N input variables(0 or 1) by a mapping function. Uses Boolean operations to produce a set of M output variables (0 or 1).

40. + Boolean Functions

41. + Boolean Function from Truth Table ABX 001 010 101 110

42. +

43. + Digital Logic Sum of Products (SOP) Fan-in, Fan-out Cascading to Reduce Inputs Boolean Algebra Laws Gate Reduction using Boolean Algebra

44. + Logic Gate Fan-n and Fan-out

45. + Gate Cascading to Reduce Inputs Implementing 3-input AND and OR functions with 2-input gates ABC = (AB)C A+B+C = (A+B)+C Implementing a 3-input NAND function with 2-input gates. NO! Correct

46. + Basic Laws of Boolean Algebra Boolean Algebra follows many algebra rules which can be used to make simpler circuits. Example: AB + ACThree gates = A(B + C), Distributive LawTwo gates NameAND FormOR Form Identity Law Null Law Idempotent Law Commutative Law Associative Law Distributive Law Absorption Law De Morgan’s Law

47. + Gate Reduction AB + ACThree gates = A(B + C), Distributive LawTwo gates

48. + Functionally Complete Sets of Gates Not all gate types are typically implemented in circuit design. Simpler if only 1 or 2 types of gates are used. A functionally complete set of gates means that any Boolean function can be implemented using only the gates in that set. Examples of functionally complete sets: AND, OR, NOT AND, NOT OR, NOT NAND NOR

49. + Simplification

50. + Checking Logic for Correctness 000100 011000 101111 111111

51. + Another Example

52. + Converting Boolean Functions to Standard SOP

53. +

54. + Sum-of-Products ABC 0000 0010 0101 0111 1000 1010 1101 1110

55. + Product-of-Sums ABC 0000 0011 0101 0111 1001 1011 1101 1110

56. + Karnaugh Maps Special form of a given truth table. Useful for reducing logic functions into minimal Boolean expressions. B  A ABX 000 011 101 110 01 001 110

57. + Karnaugh Maps 4-Variables Convert the following 4-variable truth table to its Karnaugh map equivalent: CD  AB ABCDX 00000 00010 00100 00111 01001 01011 01100 01110 10001 10010 10100 10111 11001 11010 11100 11111 00011011 000001 011100 101001 111001