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Announcements Assignment 6 due on Friday Project ideas due today

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1 Announcements Assignment 6 due on Friday Project ideas due today
Need to try to place orders this week. Your responsibility when ordering parts includes: getting them in time, getting correct part numbers, finding replacements for obsolete parts, and checking availability (no back orders, no large minimum quantities). For chips, you want DIP (dual inline package), not SOIC If using digikey for many parts, make up an order list, and send me the Web ID & Access ID  

2 Announcements Joe: Game show Buzzer Trisha & Matt: EMG (?)
Jamy: LED cube Jingliang: Piezoelectric charger Eric: Water printer(?)

3 Lecture 18 Overview Multivibrators Bistable: R-S latch
Monostable: one-shots Astable: 555 Timer (today's lab)

4 The R-S latch Cross-coupled gates form an R-S latch with two stable states (bistable multivibrator) INPUT OUTPUT A B A NOR B 1 S R Q Q’ S=1, R=0 : Q=1, Q'=0 S=0, R=1 : Q=0, Q'=1 S=0, R=0 : hold state S=1, R=1 : unstable

5 One-shot A monostable multivibrator can be very useful
produces an output pulse with the correct voltage levels and of adjustable width 74121 one-shot (monostable multivibrator) non-retriggerable. Output pulse width is determined by an external RC network

6 One-shot The is non-retriggerable - it ignores input transitions when the output pulse is HIGH It is often more useful to use a retriggerable one-shot; e.g. 74LS122 For this type of input both behave the same For this type:

7 Oscillators Digital circuits also need clocks.
We can create a simple "relaxation oscillator" using the Schmitt trigger: v+=vo/2 v-=vC This sets the clock period ( RC) This sets the threshold levels This is an astable multivibrator (no stable state)

8 Oscillators For lowish frequencies (<1MHz), a cheap and reliable clock can be made with a 555 timer chip.

9 555 Timer

10 555 Timer transistor acts as a voltage controlled switch that passes current from "discharge" input to ground when base voltage is HIGH

11 555 Timer Voltage divider Vcontrol = 2/3 Vcc Vtrig = 1/3 Vcc

12 555 Timer Voltage divider Alternatively, we can set Vcontrol externally: Control Voltage Vcontrol = Vcontrol Vtrig = 1/2 Vcontrol

13 555 Timer Two Comparators:
Output a HIGH voltage level when the "+" input is greater than the "-" input. Upper comparator: Threshold input is compared to Vcontrol Lower comparator: Trigger input is compared to Vtrig. Results are passed to a flipflop Vcontrol Vtrig

14 555 Timer Flipflop: Stores the information of which comparator last passed it a high voltage. If Threshold>Vcontrol ; S=1 Output state is HIGH. Transistor is switched on If Trigger< Vtrig; R=1 Output state is LOW Transistor is switched off. S Q Vcontrol R Vtrig

15 555 Timer: Monostable configuration. Single pulse
Initial state: flipflop is "set". Point C is HIGH. Transistor is on - passing capacitor charge to ground. When trigger input at A goes LOW, bottom comparator triggers and E goes HIGH. Flipflop changes state: C goes LOW Transistor is off - capacitor starts charging (B) through R When point B reaches 2/3 Vcc, flipflop changes state, transistor is on, capacitor discharges rapidly. Output pulse is just the inverse of C Width of output pulse = 1.1RC 555 Timer: Monostable configuration. Single pulse B D C trigger input E A A Capacitor voltage B FF output C D upper comp. E lower comp.

16 555 Timer: Astable configuration
In this mode, connect both comparator inputs to the capacitor in order to generate a clock. Charge up through RA+RB, discharge through RB Capacitor charging and discharging times can be controlled by resistor selection, in order to define the clock period and duty cycle

17 555 Timer: Practical limits
For reliable performance: The resistors RA and RB must be between 1kΩ and 3MΩ The capacitor C must be greater than 500pF Shortest period ~ 510-7, (Max frequency fmax= 2MHz) If RB>>RA, duty cycle ~50% (square wave oscillator) Power supply drift is not a problem - time constant is independent of power supply - only depends upon resistor and capacitor values. Buffer at last stage can provide enough current to drive many TTL loads

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