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331 Practice Exam.1Fall 2003 Naming Conventions for Registers 0$zero constant 0 (Hdware) 1$atreserved for assembler 2$v0expression evaluation & 3$v1function.

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Presentation on theme: "331 Practice Exam.1Fall 2003 Naming Conventions for Registers 0$zero constant 0 (Hdware) 1$atreserved for assembler 2$v0expression evaluation & 3$v1function."— Presentation transcript:

1 331 Practice Exam.1Fall 2003 Naming Conventions for Registers 0$zero constant 0 (Hdware) 1$atreserved for assembler 2$v0expression evaluation & 3$v1function results 4$a0arguments 5$a1 6$a2 7$a3 8$t0temporary: caller saves...(callee can clobber) 15$t7 16$s0callee saves... (caller can clobber) 23$s7 24$t8 temporary (cont’d) 25$t9 26$k0reserved for OS kernel 27$k1 28$gppointer to global area 29$spstack pointer 30$fpframe pointer 31$rareturn address (Hdware)

2 331 Practice Exam.2Fall 2003 Review: MIPS ISA, so far CategoryInstrOp CodeExampleMeaning Arithmetic (R & I format) add0 and 32add $s1, $s2, $s3$s1 = $s2 + $s3 subtract0 and 34sub $s1, $s2, $s3$s1 = $s2 - $s3 add immediate8addi $s1, $s2, 6$s1 = $s2 + 6 or immediate13ori $s1, $s2, 6$s1 = $s2 v 6 Data Transfer (I format) load word35lw $s1, 24($s2)$s1 = Memory($s2+24) store word43sw $s1, 24($s2)Memory($s2+24) = $s1 load byte32lb $s1, 25($s2)$s1 = Memory($s2+25) store byte40sb $s1, 25($s2)Memory($s2+25) = $s1 load upper imm15lui $s1, 6$s1 = 6 * 2 16 Cond. Branch (I & R format) br on equal4beq $s1, $s2, Lif ($s1==$s2) go to L br on not equal5bne $s1, $s2, Lif ($s1 !=$s2) go to L set on less than0 and 42slt $s1, $s2, $s3if ($s2<$s3) $s1=1 else $s1=0 set on less than immediate 10slti $s1, $s2, 6if ($s2<6) $s1=1 else $s1=0 Uncond. Jump (J & R format) jump2j 2500go to 10000 jump register0 and 8jr $t1go to $t1 jump and link3jal 2500go to 10000; $ra=PC+4

3 331 Practice Exam.3Fall 2003 Question I: Processor Memory Addressable locations read addr/ write addr read data write data 2 32 Assume that memory has 2 32 addressable locations, and MIPS is 32-bit architecture. Please specify the width of the following address and data lines between the processor and the memory.

4 331 Practice Exam.4Fall 2003 Question II:  Question 3.10 on page 199 (PH text book)  Question 3.5 on page 198 (PH text book)

5 331 Practice Exam.5Fall 2003 Question III:  What if the branch destination is further away than can be captured in 16 bits? What can the assembler do to alleviate this problem? beq$s0, $s1, L1

6 331 Practice Exam.6Fall 2003 Question IV: Give the machine code for the following assembly code segment: (you may use the combination of decimal, hexidecima, and/or binary encodings.) 0x00400040Loop:add $t1, $s3, $s3 add $t1, $t1, $t1 add $t1, $t1, $s6 lw $t0, 0($t1) bne $t0, $s5, Exit add $s3, $s3, $s4 j Loop Exit:


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