Presentation is loading. Please wait.

Presentation is loading. Please wait.

Team W1 1. Bobby Colyer (W11) 2. Jeffrey Kuo (W12) 3. Myron Kwai (W13) 4. Shirlene Lim (W14) Stage I: 21 st January 2004 DESIGN PROPOSAL Presentation #1:

Similar presentations


Presentation on theme: "Team W1 1. Bobby Colyer (W11) 2. Jeffrey Kuo (W12) 3. Myron Kwai (W13) 4. Shirlene Lim (W14) Stage I: 21 st January 2004 DESIGN PROPOSAL Presentation #1:"— Presentation transcript:

1 Team W1 1. Bobby Colyer (W11) 2. Jeffrey Kuo (W12) 3. Myron Kwai (W13) 4. Shirlene Lim (W14) Stage I: 21 st January 2004 DESIGN PROPOSAL Presentation #1: Rijndael Encryption Overall Project Objective: Implement the new AES Rijndael algorithm on chip 18-525 Integrated Circuit Design Project ~*Team Manager: Rebecca Miller*~

2 Status  Project Chosen  Alternatives Studied and Eliminated  Specifications Defined  Verilog Obtained  Gate-Level Verilog  Cut down 128-bit design into a manageable size (32? 64?)  Test Benches  Schematic Design  Layout  Simulations 18-525 Integrated Circuit Design Project

3 Design Decisions  128-bit encryption too large for the scope of this course  Plan to step down to 32-bit  Number of rounds (normally 10) most likely need to be lessened  Doing encryption only  Leaving decryption out due to size restrictions  Encryption + Decryption for 128-bit is 40,000 gates!  Need to include the key schedule  Takes up ~85% of the area 18-525 Integrated Circuit Design Project

4 Alternative Projects  2D DCT  Was considered by Zack’s group and was found to be done  Had the powerpoint almost done before we found out…  Other Encryption Algorithms  Triple DES – outdated and sucks, can be cracked fairly easily now  Serpent – have code, better than RC6, but Rijndael was chosen for a reason right?  Histogram Equalizer  Had MATLAB code but involved floating point statistics (FP Division!)  FPU – Floating Point Unit  Does Floating Point Add/Sub/Mult/Div  Too insane – Rebecca said so  Edge Detection  Too simple, already done as sub-component of previous projects  Simple MIPS Processor  Too simple, need to add more instructions, marketing?  Way too many more… my computer is full of them! 18-525 Integrated Circuit Design Project

5 Why is this the AES?!  Fastest Encryption / Decryption in general  No key setup time (hardcoded)  Serpent, MARS, RC6 all require setup time  Better than DES, Triple DES (Outdated)  Triple DES could be cracked in linear time easily with machines from ‘90s  25x faster on the same general-purpose hardware  Easily extendable and scaleable (versatile)  Block length, key length, and number of rounds  Key and block length can be any multiple of 32 (128-bit, 192, 256…)  Fast, simple, compact algorithm  “Rijndael is the best mixture of simplicity, speed, and protection” 18-525 Integrated Circuit Design Project

6 This is why AES is needed… “The EFF's $200,000 machine breaks DES in a few days. An aviation website gives the cost of a B1 bomber as $200,000,000. Spending that much, an intelligence agency could expect to break DES in an average time of six and a half minutes.” 18-525 Integrated Circuit Design Project

7 Applications  Suited for Smart cards  Currently adapted to modern processors  Pentium and RISC processors  Theoretically unbreakable using modern technology  Hacking algorithms take ~2^87 – 2^100 operations  Today’s machines aren’t powerful enough to compute & check  To protect digital information  Data, voice, video, and images from attack, impersonation, or eavesdropping  SSL Security for Internet Browsers 18-525 Integrated Circuit Design Project

8 Block Diagram 18-525 Integrated Circuit Design Project

9 Transistor Count (Assuming 32-bit Implementation)  ~256 Registers~3500  XORs~1200  Inverters/Buffers~500  SBOX  Registers~12000  Key Schedule  XORs~100  Shifters (Hardcoded – Just routing wires) 0  Muxes~8000 Total:~25300 18-525 Integrated Circuit Design Project

10 Problems & Questions  Cutting code down from 128-bit to 32-bit  Found different implementations of Rijndael  Some had divider/multiplier, some just XORs  Too many transistors – Pushing the limit  Design too big – may leave out portions of design  Parallel design = More transistors, but faster  Need balance  Group M2 from 2000 should not have done the DCT 18-525 Integrated Circuit Design Project


Download ppt "Team W1 1. Bobby Colyer (W11) 2. Jeffrey Kuo (W12) 3. Myron Kwai (W13) 4. Shirlene Lim (W14) Stage I: 21 st January 2004 DESIGN PROPOSAL Presentation #1:"

Similar presentations


Ads by Google