1. A presentation by Angela Little SULI Program 8/4/04 Pulsar Boards and the Level II Trigger Upgrade at CDF

2. Outline General Background Pulsar Boards Testing Pulsar Boards Testing Active Splitter Conclusions Acknowledgements

3. My Summer Goals Test new Pulsar boards and mezzanine cards Document testing procedures Test active splitter Learn stuff

4. CDF

5. Trigger: Filtering of Events ~ MHz Produced ~20kHz Accept Rate ~50Hz Accept Rate ~300Hz Accept Rate pp -

6. L2 decision crate L1L1 TRACKTRACK SVTSVT CLUSTERCLUSTER PHOTONPHOTON MUONMUON Magic Bus α CPU L2 decision crate electron ~20kHz Output: 300Hz Current L2 System Many Data Paths Custom Alpha Processor Custom Backplane Different Boards for Different Data Paths

7. L2 Upgrade Use one type of board to interface with ALL data paths Interface with modern CPUs, better performance More flexibility Fully self-testable, board & system level  crucial for commissioning & maintenance

8. Mezzanine slotsAUX card Pulsar Design  universal/self-testable Pulsar Custom mezzanine Bottom view Pulsar design philosophy: able to interface with any user data with any link format (e.g. S-LINK) via mezzanine Many applications within & outside CDF (compatible with Atlas) S-LINK  PCI  GbE works up to 100MHz Top view

9. Gigabit Ethernet RF clock SRAMs All interfaces are bi-directional (Tx & Rx)  self-testable Spare lines Standard link another Pulsar or S-LINK to PCI Pulsar board design general purpose, can be used within/outside CDF

10. Testing ALL Interfaces on Pulsar Tx Pulsar Rx Pulsar What needs to be tested: VME interfaces FPGA internal memory all LVDS interfaces all mezzanine card interfaces … I have tested a few Pulsars this way, and am currently documenting the testing procedures …

11. Teststand Setup

12. PC SLINK Pulsar pre-processors L1 muon L1 XTRP L1 trigger TS L2 CAL (CLIST/Iso) PreFred ShowMax (RECES) SVT Muon Cluster Electron Merger SVT L2toTS Pulsar based new L2 decision Commissioning strategy: (1)Use Tx  Rx in teststand (2)Split all input signals, run parasitically with real system

13. Why do we need an Active Splitter? L2 Current L2 Upgrade Active Splitter Fiber Data To allow us to commission the new system in parasitic mode

14. TX Using Pulsar to Test the Active Splitters RX 16x

15. Goal L2 Current L2 Upgrade Active Splitter Fiber Data

16. Summary I have learned a lot, about CDF L2 trigger in general, and the Pulsar board in particular I have tested new Pulsar boards and documented the testing procedures I have helped to test active splitters which will be used to commission the new L2 system

17. Acknowledgements SULI Program and Fermilab Erik, Roger, and Max The Interns Ted Liu Burkard Reisert, Cheng-Ju Lin, and Chris Neu Pulsar Group

18. Works Cited Pulsar Project. University of Chicago/Fermilab. 25 July 2004..

19. Active Splitter Diagram Optical Rx Optical Tx Optical Tx V thresh V cc Comparator Duplicator

20. Testing Active Splitter Testing

21. The Active Splitter

24. Test Stand for Production Testing TS L1 Mezz. VME access Internal RAM and SRAM Internal com. TS interface SVT/XTRP L1 Signals Mezzanine card Interface Slink Interface AUX Tx Rx Mezz. SVT/XTRP SLINK