1. Students: Asulin Ofir Heller Itai Supervisor: Mony Orbach In association with: June 16, summer 2006

2. Project Goals: Developing a Communication adapter to connect between a USB PC Port and an Experiment board.

3. RS232 is disappearing from the PC ’ s. We can find a USB Port in all computers today. USB supports a bigger flow of data. In addition, the existing communication adapter includes a microcontroller, which contents are unknown. Why USB instead of RS232?

4. Requirements : A standard adapter for all the boards in the laboratory. Support currently used applications. Hi grade of reliability.

5. How the system works today? 1) PC Program is loaded and the Experiment Board is turned on. 2) The student enters the board number and board type used. 3) In the PC a number is randomly chosen. 4) The PC sends to the board the board number, the board type and the randomly chosen number. 5) The communication adapter verifies the correctness of the received data. 6) The randomly chosen number is used by the Ex. Board to set the value of the different components. 7) The PC loads the expected results based on this number.

6. Block Diagram MIDGAMPC 9 Optional Ext. PORT PCB communication board USB adaptor & interface card USB

7. We have used in this project a board designed at a previous semester. It contains a USB connector which connects the PC to the FPGA. USB connector and FPGA DLPDLP MIDGAM PC CLK RST BUZZERDIP_SW Transceiv er Transceiv ers Optional Ext. PORT PCB POWER SUPPLY DRAW CYCLON FPGA EPCS

8. The FPGA Tasks 1. Gets the draw number, the board type and number from the pc. 2. Signals the buzzer. 3. Compares the board number and type to the numbers received from the Interface Card. 4. If it doesn ’ t match - sends an error number to the PC. 5. Fixes the component values at the board as required.

9. The FPGA Top Level Analog Interface DLP Operating Machine Draw Buzzer Ext. Port Write Read

10. Operating Machine Block The Operating Machine block is the core of the whole system. This block is synchronized with the PC application through the DLP. The Operating Machine (OM) works as following: 1. After Boot-Up, waits until the DLP sends a ready signal. 2. Reads the real Board type and Board number from the wire-up card and activate the Switch unit to read the Board type and number from the DLP.

11. 3. Activate the switch unit to read from the DLP the number to be set at the counter. 4. Activate the buzzer unit. 5. Compare the real board type and number with those requested by the PC program and produces an error/success message: Error = 1: Real board type is different from requested. Error = 2: Real board number is different from requested. Error = 5: Real board number and type match the requested (success). 6. In case of success send to the draw unit the number to be set at the counter and activate it. 7. Activate the switch unit to send the error number to the PC through the DLP. The OM works as following (cont ’ ):

12. Draw Block This unit is used to set the values of the component to be used in the experiment. The draw block controls a cyclic counter placed at the experimental board. The block works as follows: 1. gets a start flag and a draw number (0-3) from the OM. 2. compares that number with the actual output of the counter. 3. if there is no match, sends a start running signal to the counter. 4. every counter cycle do step 2, until there is a match.

13. Other Blocks Switch Unit – Performs the read and write operations of the DLP. The unit is controlled by the OM. The reading and writing is done according to the read/write cycles of the DLP. Buzzer Unit - This unit controls the activation of the buzzer placed on the card.

14. The Buzzer – When the data is received from the PC, the FPGA send a signal to the buzzer, to indicate connection. The Board Number – There are lots of Boards in the lab. This is the serial number of the board. It is set by a dip-switch. The Board Type – There are different types of boards. The type is also set by a dip-switch. Other Elements

15. The PC Application a simple PC application has been built in order to verify the correctness of the communication adapter. The application flow chart: END Initialize USB connection Ask user for type and serial number interval Is a device connected? Ask user for desired drawn number. Send the entered numbers to the experimental board Read the result sent by the experimental board. Print on the screen the error/succeed message based on the received result Initialize USB connection No Ask user for type and serial number Yes Is a device connected? Ask user for desired drawn number. Send the entered numbers to the experimental board Read the result sent by the experimental board. Print on the screen the error/succeed message based on the received result

16. Summery The communication adapter operation has been tested in 2 ways: 1. by simulations using a signal generator. 2. by connecting it to a real experiment board. both were successful. Now, after the communication adapter is finished, a second team needs to create a code that is designed for the system running in the EE lab.