1. Addition מבנה המחשב + מבוא למחשבים ספרתיים תרגול 7#

2. Definition of a binary adder A binary adder with input length n is a combinational circuit specified as follows: Claim: the functionality of Adder(n) is well defined.

3. We show that for every A[n-1:0], B[n-1:0] and C[0] there exists S[n-1:0] and C[n] such that:

5. Lower bounds on the cost and delay of combinational circuits that implements Adder(n) We would like to show a lower bound of linear cost and logarithmic delay in n. It’s suffices to show that there exists at least one output, σ, of Adder(n) such that |cone( σ )| = n with respect to Adder(n). We show that the cone size of the carry-out bit C[n] is 2n+1. Input bit A[i], 0 ≤ i ≤ n-1, is in the cone of C[n]: Set A[n-1:i+1] = 0 n-i-1, A[i-1:0] = 0 i, B[n-1:0] = 1 n, and C[0] = 0. If A[i] = 0, then Necessarily C[n] = 0, otherwisea contradiction.

6. If A[i] = 1, then Necessarily C[n] = 1, otherwise a contradiction. By symmetry, every bit in the string B[n-1:0] is also in the cone of C[n]. The carry-in bit C[0] is like A[0], therefore C[0] is also in the cone of C[n]. Note that the same setting also proves:

7. Conditional Sum Adder – CSA(n)

8. Correctness Proof The proof is by induction on n. The induction basis, for n = 1, follows directly from the definition of a Full-Adder. The induction hypothesis, for m < n, is: Induction step, we prove for n: (1)

9. (2b) (2a)

11. Assume that n = 2 l and set k = n/2, CSA(n) - Delay and Cost analysis under fan-out limitations 1n – k + 1

13. Master Theorem for recurrences provides:

14. We didn’t take into account the fan-out of the input gates. Is it justified in the case of CSA(n)? Cost: Note that all input gates feed Full-Adder circuits only. How much FAs are there in CSA(n)? The fan-out of all input gates together is Θ(n 1.58 ). The total cost needed for buffers is Θ(n 1.58 ).

15. Delay: The MSBs A[n-1] and B[n-1] have the maximum fan-out. The input gates’ fan-out in the case of CLA(n) is counted only once and it is at most: To conclude, in CSA(n) design: No change in cost asymptotics due to fan-out limitations. Quadratic increase in delay asymptotics due to fan-out limitations.