1. Status – Week 250 Victor Moya

2. Summary Current State. Current State. Next Tasks. Next Tasks. Future Work. Future Work. Creditos investigación. Creditos investigación.

3. Current State Traces: Traces: We can get full OpenGL traces using the modified GLTrace. We can get full OpenGL traces using the modified GLTrace. Only works for win32. Only works for win32. TraceDriver on works. Initial test traces being parsed in a week or so. TraceDriver on works. Initial test traces being parsed in a week or so.

4. Current State bGPU: bGPU: Fully implemented the ‘basic’ functionality. Fully implemented the ‘basic’ functionality. Just tested a few AGP transactions for easy errors. Just tested a few AGP transactions for easy errors. Waiting for the first trace from TraceDriver to continue the testing. Waiting for the first trace from TraceDriver to continue the testing.

5. Current State Simulator: Simulator: Implemented a basic Command Processor with a simple interface. Implemented a basic Command Processor with a simple interface. Implemented a basic Memory Controller. Only one transaction at a time supported. Only simulates access and transmission delay. Implemented a basic Memory Controller. Only one transaction at a time supported. Only simulates access and transmission delay. Implemented a basic Streamer unit. Only supports non indexed vertexs arrays. Hardware model should be modified. Implemented a basic Streamer unit. Only supports non indexed vertexs arrays. Hardware model should be modified.

6. Current State Simulator: Simulator: Implemented a basic Shader unit. Only vertex shader functionality is supported right now. Implemented a basic Shader unit. Only vertex shader functionality is supported right now. Implemented a fake Rasterizer unit that emulates the last geometry, rasterization and fragment stages of the pipeline. Uses a simple OpenGL wrapper to emulate the functionality. Implemented a fake Rasterizer unit that emulates the last geometry, rasterization and fragment stages of the pipeline. Uses a simple OpenGL wrapper to emulate the functionality.

7. Current State Command Processor: Command Processor: Writes to local memory. Writes to local memory. Writes to registers. Writes to registers. Commands to the units. Commands to the units. A reset state and behaviour should be decided. A reset state and behaviour should be decided. Data transfer time simulation (AGP to local memory, local memory to CP) not still fully complete. Data transfer time simulation (AGP to local memory, local memory to CP) not still fully complete.

8. Current State Memory Controller: Memory Controller: Current simulation model is very limited. Current simulation model is very limited. Only one transaction supported at the same time. Only one transaction supported at the same time. Just adds transfer and access delay but doesn’t simulates the hardware. Just adds transfer and access delay but doesn’t simulates the hardware. Signals (buses?) to CP and Streamer. Signals (buses?) to CP and Streamer.

9. Current State Streamer: Streamer: Only ‘stream’ model implemented. Only ‘stream’ model implemented. A hardware model must be decided and implemented for simulation. A hardware model must be decided and implemented for simulation.

10. Current State (Vertex) Shader: (Vertex) Shader: Simulates a multithreaded pipelined SIMD processor. Simulates a multithreaded pipelined SIMD processor. Buggy data dependence detection code (for example different elements in a SIMD register used as scalar). Buggy data dependence detection code (for example different elements in a SIMD register used as scalar). Lacks memory (texture) emulation: pixel shader support. Lacks memory (texture) emulation: pixel shader support.

11. Current State Rasterizer: Rasterizer: Just emulation using OpenGL. Just emulation using OpenGL. Just supported define the needed GL state and draw shaded triangles. Just supported define the needed GL state and draw shaded triangles. Lacks texture support. Lacks texture support. Some features should be added if we keep testing the VS but should be scrapped in the future and sreal simulator/emulator units be used instead. Some features should be added if we keep testing the VS but should be scrapped in the future and sreal simulator/emulator units be used instead.

12. Next Tasks Generate GPU traces from GL traces. Generate GPU traces from GL traces. Test the current infraestructure: Test the current infraestructure: Just test ‘it works’ using simple traces. Just test ‘it works’ using simple traces. Test the current (vertex) shader implementation. Test the current (vertex) shader implementation. Test and simulate the current MC/Streamer/VS model. Test and simulate the current MC/Streamer/VS model. It should be decided a better hardware model than the currently implemented. It should be decided a better hardware model than the currently implemented.

13. Next Tasks Do some cleaning in the code. Do some cleaning in the code. Generate documentation: Generate documentation: Compile, correct and expand current Doxygen on- code documentation. Compile, correct and expand current Doxygen on- code documentation. Add specification documentation: Add specification documentation: Simulator model: Boxes & Signals. Simulator model: Boxes & Signals. Proposed hardware implementation of the 3D pipeline. Proposed hardware implementation of the 3D pipeline. Interface (programming manual) for out GPU. Interface (programming manual) for out GPU. Library/Driver (OpenGL) implementation/use/support documentation. Library/Driver (OpenGL) implementation/use/support documentation.

14. Next Tasks Add more functionality to current implemented units: Add more functionality to current implemented units: Memory Controller: more correct simulation of the real hardware. Memory Controller: more correct simulation of the real hardware. Streamer: index mode and currect stream model. Streamer: index mode and currect stream model. Shader: more flexibility, more complete implementation, memory access. Shader: more flexibility, more complete implementation, memory access.

15. Future Work Add more simulation units: Add more simulation units: Clipping: could be skipped (homogeneous coordiantes rasterization + guardband). Clipping: could be skipped (homogeneous coordiantes rasterization + guardband). Divide by w: could be skipped (homogeneous rasterization). Divide by w: could be skipped (homogeneous rasterization). Culling: simple test (matrix determinant|triangle area). Can be added as a first rasterization stage as the calculations could be useful in the rasterization process. Culling: simple test (matrix determinant|triangle area). Can be added as a first rasterization stage as the calculations could be useful in the rasterization process. Rasterization: Setup + Fragment generation. Different models/implementations available. Rasterization: Setup + Fragment generation. Different models/implementations available.

16. Future Work Add more simulation units: Add more simulation units: Early Z tests/Hierarchical Z: should be easy. Requires memory access (RW) + cache. Early Z tests/Hierarchical Z: should be easy. Requires memory access (RW) + cache. Pixel Shader: Add PS instructions (easy) to current shader simulator/emulator. Add texture (memory access) support (R,W?). Pixel Shader: Add PS instructions (easy) to current shader simulator/emulator. Add texture (memory access) support (R,W?). Color ops: skip (to be emulated using PS) or implement (better pixel throughput?). Easy. Color ops: skip (to be emulated using PS) or implement (better pixel throughput?). Easy. Alpha test: Hard! Special cases to study. Requires memory access (R). Alpha test: Hard! Special cases to study. Requires memory access (R).

17. Future Work Add more simulation units: Add more simulation units: Z test: final ‘correct’ Z test. Easy. Requires memory access (RW) and maybe cache/buffer. Z test: final ‘correct’ Z test. Easy. Requires memory access (RW) and maybe cache/buffer. Stencil test: should be easy. Requires memory acces (RW) Stencil test: should be easy. Requires memory acces (RW) Final color write: requires memory access (R?W). Final color write: requires memory access (R?W).

18. Future Work. GET SOME SIMULATION RESULTS!!! GET SOME SIMULATION RESULTS!!! Propose a (new?) 3D pipeline hardware implementation. Propose a (new?) 3D pipeline hardware implementation. Add future/new hardware capabilities to the pipeline (Raytracing/Radiosity). Ask/search software research. Add future/new hardware capabilities to the pipeline (Raytracing/Radiosity). Ask/search software research.

19. Creditos investigación. Primera semana de Junio. Primera semana de Junio. “Escrito del tutor indicando el número de créditos que se deben aprobar por los trabajos realizados (como máximo el número de creditos matriculados) así como la nota obtenida.” “Escrito del tutor indicando el número de créditos que se deben aprobar por los trabajos realizados (como máximo el número de creditos matriculados) así como la nota obtenida.” “Dicho escrito deberá acompañarse de alguna documentación que acredite la realización de dicho trabajo (report de investigación, artículo en congreso o revistas,...).” “Dicho escrito deberá acompañarse de alguna documentación que acredite la realización de dicho trabajo (report de investigación, artículo en congreso o revistas,...).”