2. 331 W01.1 Spring 2005 14:332:331 Computer Architecture and Assembly Language Spring 2005 Lecture 1 [Adapted from Dave Patterson’s UCB CS152 slides and Mary Jane Irwin’s PSU CSE331 slides]

3. 331 W01.2 Spring 2005 Course Administration  Instructor:Yanyong Zhang l yyzhang@ece.rutgers.edu l Core 518 l Hours: TF 10 -11 am  TAs:TBD  Labs:Everyone will be using your ece account. Computer Organization and Design: The Hardware/Software Interface,Third Edition, Patterson and Hennessy  Texts:Computer Organization and Design: The Hardware/Software Interface,Third Edition, Patterson and Hennessy VHDL Starter’s Guide, Yalamanchili VHDL Starter’s Guide, Yalamanchili

4. 331 W01.3 Spring 2005 Course Administration  Course web page http://www.ece.rutgers.edu/~yyzhang/spring05 http://www.ece.rutgers.edu/~yyzhang/spring05 l Please check the course web page regularly (at least once before class) for announcements, assignments, etc.  Class mailing list ece331_class@rams.rutgers.eduece331_class@rams.rutgers.edu l Please post emails on this list only when you want to talk to the whole class. If you only want to talk to the instructor, or a TA, please do not abuse the mailing list. l I will be using the list to distribute the announcements and answer some common questions.  WebCT is available for you to check your grades and conduct group discussion. I will NOT post any notes there.

5. 331 W01.4 Spring 2005 Convention  Please check your email and the course web page regularly.  Every class l First 10-15 minutes, review of last class. l Students will be randomly picked to answer questions l Class participation will be based on this l Discussion-oriented  Instructor vs. TA vs. students l Instructors are responsible for answering questions related to the lectures to both students and TAs l Students should ask TAs about the homework and grades l If TAs cannot answer the students, they will contact the instructor directly.

6. 331 W01.5 Spring 2005 Course Goals and Structure  Fundamentals of assembly language programming l MIPS assembler programming using the spim system  Introduction to the major components of a computer system. To bridge the gap between high level programming and low level digital design. l VHDL design simulation using the Synopsys VSS tools  Prerequisite (required): l 14:332:231 Digital Logic Design l 14:332:252 Programming Methodology  Corequisites l 14:332:333 Computer Architecture Lab

7. 331 W01.6 Spring 2005 spim Assembler and Simulator  spim is a self-contained assembler and simulator for the MIPS R2000/R3000 l It provides a simple assembler, debugger and a simple set of operating system services l It implements both a simple, terminal-style interface and a visual windowing interface  Available as l xspim on unix -installed on the Sun machines in EE bldg, /usr/local/spim/bin/xspim l PCSpim on Windows -can be downloaded and installed on your own PC from www.cs.wisc.edu/~larus/spim.html l Sorry, there is no Macintosh version of spim

8. 331 W01.7 Spring 2005 vhdl Analyzer and Simulator  VSS is Synopsys’s VHDL system simulator l It provides a vhdl analyzer that translates vhdl code into the binary required by the vhdl simulator l It provides a vhdl simulator and a source code debugger with a graphical user interface for monitoring the simulation l It provides a waveform viewer for observing the results of the simulation as signal waveforms  Available as l vhdlan (text based) or gvan (graphical) l vhdlsim (text based) or vhdldbx (graphical) l waves -The entire (almost) Synopsys tool set is installed on the Sun machines in the EE bldg

9. 331 W01.8 Spring 2005 Grading Information  Grade determinates l Midterm Exam #1~21% l Midterm Exam #2~23% l Final Exam ~26% l 7 Homework/Programming Assignments~20% l In-class pop quizzes~ 5% l Class Participation~ 5%  Please let me know about exam conflicts ASAP

10. 331 W01.9 Spring 2005 Grading Policies  Assignments will be submitted via email (mostly) and must be turned in by 5:00pm on the due date. No late assignments will be accepted.  All the assignments should be completed individually. Duplicate assignments will receive duplicate grades of zero. Second offenses will result in a final course grade of F.  Grades will be posted on the WebCT l See TAs about grading questions on the assignments; see instructor (me) about grading questions on the exams l Must submit email request for change of grade after discussions with the TAs or instructor

11. 331 W01.10 Spring 2005 Head’s Up  This week’s material l Course introduction -Reading assignment – PH 1.1 through 1.3 and A.9 through A.10  Reminders l 14:332:333 will start from next week l Question/comments about the system go to help@ece.rutgers.edu; questions about the programming assignments go to the course TAs. help@ece.rutgers.edu  Next week’s material l Introduction to MIPS assembler -Reading assignment - PH 3.1 through 3.3, 3.4, and 3.7

12. 331 W01.11 Spring 2005 What You Should Already Know  How to write, compile and run programs in a higher level language (C, C++, Java, …)  How to create, organize, and edit files and run programs on Unix  How to represent and operate on positive and negative numbers in binary form (two’s complement, sign magnitude, etc.)  Logic design l How to design combinational and sequential components (Boolean algebra, logic minimization, technology mapping, decoders and multiplexors, latches and flipflops, registers, mealy/moore finite state machines, state assignment and minimization, etc.) l How to use a logic schematic capture and simulation tool (e.g., LogicWorks)

13. 331 W01.12 Spring 2005 Below the Program  High-level language program (in C) swap (int v[], int k) (int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; )  Assembly language program (for MIPS) swap:sll$2, $5, 2 add$2, $4,$2 lw$15, 0($2) lw$16, 4($2) sw$16, 0($2) sw$15, 4($2) jr$31  Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000...

14. 331 W01.13 Spring 2005 Below the Program  High-level language program (in C) swap (int v[], int k) (int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; )  Assembly language program (for MIPS) swap:sll$2, $5, 2 add$2, $4,$2 lw$15, 0($2) lw$16, 4($2) sw$16, 0($2) sw$15, 4($2) jr$31  Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000... C compilerassembler

15. 331 W01.14 Spring 2005 Advantages of Higher-Level Languages  Higher-level languages  As a result, very little programming is done today at the assembler level l Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, …) l Improve programmer productivity – more understandable code that is easier to debug and validate l Improve program maintainability l Allow programmers to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine) l Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine

16. 331 W01.15 Spring 2005 Machine Organization  Capabilities and performance characteristics of the principal Functional Units (FUs) l e.g., register file, ALU, multiplexors, memories,...  The ways those FUs are interconnected l e.g., buses  Logic and means by which information flow between FUs is controlled  The machine’s Instruction Set Architecture (ISA)  Register Transfer Level (RTL) machine description

17. 331 W01.16 Spring 2005 Major Components of a Computer Processor Control Datapath Memory Devices Input Output

18. 331 W01.17 Spring 2005 Computer Types  Notebook computer l Sony Vaio, IBM Thinkpad, etc l Mobile users  Desktop l Dell Dimension, Dell OptiPlex l Most widely used in everyday life  Workstation l Dell Precision, Sun Blade, IBM IntelliStation l Same dimensions as desktop computers l High-resolution graphics I/O capability, more computational power  servers ~ supercomputers l HP Integrity Superdome, IBM eServer l Computing power and storage

19. 331 W01.18 Spring 2005 Computer Organization Processor Control Datapath Memory Devices Input Output

20. 331 W01.19 Spring 2005 Instruction vs. Data void main (){ // instruction int a,b,c; // data c = a + b; // instruction }  Instructions (machine instructions) Govern the transfer of information within a computer (e.g., load, store) Specify the arithmetic and logic operations to be performed (e.g., add, sub, mul)  Data Operands of the instruction  Both instructions and data are in binary format

21. 331 W01.20 Spring 2005 Input Device Inputs Object Code Processor Control Datapath Memory Devices Input Output 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000  Input devices l Keyboard l Mouse l Network l Joysticks, trackballs, etc

22. 331 W01.21 Spring 2005 Object Code Stored in Memory Processor Control Datapath Memory Devices Input Output 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000

23. 331 W01.22 Spring 2005 Memory Unit: to store the program  Primary storage: fast memory that operates at electronic speed l Programs must be stored in fast memory when they are being executed l The memory contains a large number of semiconductor storage cells, each containing a bit l The unit of memory access is a byte or a word, not a bit l To provide easy access to any byte/word, a distinct address is associated with each byte location l The number of bits in each word is called word length of the computer. That is also the length of instructions. l RAM: random access memory. Access time to any location is uniform l Memory hierarchy: L-1 cache, L-2 cache, main memory  Secondary storage l Magnetic disks, tapes, optical disks

24. 331 W01.23 Spring 2005 How to execute a program?  Sequential execution Fetch Decode Exec

25. 331 W01.24 Spring 2005 Processor Organization  Control needs to have the l Ability to input instructions from memory l Logic and means to control instruction sequencing l Logic and means to issue signals that control the way information flows between datapath components l Logic and means to control what operations the datapath’s functional units perform  Datapath needs to have the l Components - functional units (e.g., adder) and storage locations (e.g., register file) - needed to execute instructions l Components interconnected so that the instructions can be accomplished l Ability to load data from and store data to memory

26. 331 W01.25 Spring 2005 Instruction Fetch  How do you know which instruction next?  PC (Program Counter)  Where to store PC? (disk, memory, cache, register)  How to update PC? (sequential, branch)

27. 331 W01.26 Spring 2005 Processor Fetches an Instruction Processor Control Datapath Memory Devices Input Output 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000 Processor fetches an instruction from memory PC

28. 331 W01.27 Spring 2005 Control Decodes the Instruction Processor Control Datapath Memory Devices Input Output 000000 00100 00010 0001000000100000 Control decodes the instruction to determine what to execute

29. 331 W01.28 Spring 2005 Datapath Executes the Instruction Processor Control Datapath Memory Devices Input Output contents Reg #4 ADD contents Reg #2 results put in Reg #2 Datapath executes the instruction as directed by control 000000 00100 00010 0001000000100000

30. 331 W01.29 Spring 2005 Output Data Stored in Memory Processor Control Datapath Memory Devices Input Output 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000 At program completion the data to be output resides in memory

31. 331 W01.30 Spring 2005 Output Device Outputs Data Processor Control Datapath Memory Devices Input Output 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000

32. 331 W01.31 Spring 2005 Hardware/Software Interface Application software System software hardware Instruction set architecture (architecture)  Instruction set architecture includes everything programmers need to know to make a binary program to work l Instruction l Arithmetic and Logic Unit (ALU), registers, etc

33. 331 W01.32 Spring 2005 The Instruction Set Architecture instruction set architecture software hardware The interface description separating the software and hardware.

34. 331 W01.33 Spring 2005 MIPS R3000 Instruction Set Architecture  Instruction Categories l Load/Store l Computational l Jump and Branch l Floating Point -coprocessor l Memory Management l Special R0 - R31 PC HI LO OP rs rt rdsafunct rs rt immediate jump target  3 Instruction Formats: all 32 bits wide Registers Q: How many already familiar with MIPS ISA?

35. 331 W01.34 Spring 2005 How Do the Pieces Fit Together? I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware  Coordination of many levels of abstraction  Under a rapidly changing set of forces  Design, measurement, and evaluation Memory system Datapath & Control

36. 331 W01.35 Spring 2005 How Do the Pieces Fit Together? I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware  Coordination of many levels of abstraction  Under a rapidly changing set of forces  Design, measurement, and evaluation Datapath & Control Memory system