1. PowerPC (RISC) Architecture Michael McCarthy Scott Watson Jason Wollenberg

2. PowerPC Evolution 601 (32-bit) 603 (32-bit) 604 (32-bit) 740/750 (64-bit) G4 (64-bit) G4 rev.3 (64-bit) Ship Date19931994 199719992001 Top Speed (MHz) 120300350366500867 L1 Cache Instr / Data (Kbyte/Kbyte) -16/1632/32 L2 Cache---256K-1M 256K L3 Cache-----1M-2M

3. Topical Outline System Overview (G4) Memory Management / Cache Hierarchy System Model Addressing and Instruction Sets Register Sets Branch Processing Exception Handling AltiVec (vector processes)

4. System Overview

5. Memory Management 2 Memory Management Units 3 Address Translation Modes Page Address Translation Block Address Translation Real Addressing Mode Memory Support Physical Memory: 64 Gigabytes (2 36 ) Virtual Memory: 4 Pentabytes (2 52 )

6. Cache Hierarchy L1 Cache 32Kbyte Instruction and 32Kbyte Data Cache L2 Cache 256Kbyte unified Cache L3 Cache On chip L3 Cache Controller 1 – 2Mbyte off chip

7. System Model – PowerPC Register Set

8. Branch Processing Unconditional and conditional instructions supported Conditional Branch Instructions Test single bit of CR and count register 9 separate conditions Iteration loops use count register Use of link register allows for call/return processing

9. Exception Handling exception condition  process interrupt Examples System reset Machine check interrupt MSR (Machine State Register) Allows for recovery of processor state Interrupt Handling Utilizes specific interrupt handlers.

10. AltiVec Technology Why is this important???

11. AltiVec Technology:Implementation

12. Questions?

13. References M. Morris Mano and Charles R. Kime. Logic and Computer Design Fundamentals, 2nd Ed. Prentice-Hall: Upper Saddle River, NJ, 2000. William Stallings, Computer Organization and Architecture, 5th Edition, Prentice-Hall, 2000. Sam Fuller. Motorola’s AltiVec Technology. Motorola Inc. Semiconductor Product Sector. 1998. http://e- www.motorola.com/brdata/PDFDB/docs/ALTIVECWP.pdfhttp://e- www.motorola.com/brdata/PDFDB/docs/ALTIVECWP.pdf MPC7450 RISC Microprocessor Technical Summary. Motorola Inc. 5/2001. http://e- www.motorola.com/brdata/PDFDB/docs/MPC7450TS.pdfhttp://e- www.motorola.com/brdata/PDFDB/docs/MPC7450TS.pdf www.apple.com