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High Speed Stepped Electronic Load for Dynamic Testing of DC/DC Converters TEAM MEMBERS: Sean Kenney Brian Sicard Mark Thomas ECE ADVISOR: Kuan Zhou INDUSTRY.

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Presentation on theme: "High Speed Stepped Electronic Load for Dynamic Testing of DC/DC Converters TEAM MEMBERS: Sean Kenney Brian Sicard Mark Thomas ECE ADVISOR: Kuan Zhou INDUSTRY."— Presentation transcript:

1 High Speed Stepped Electronic Load for Dynamic Testing of DC/DC Converters TEAM MEMBERS: Sean Kenney Brian Sicard Mark Thomas ECE ADVISOR: Kuan Zhou INDUSTRY ADVISOR: John Canfield

2 Sean Kenney PROBLEM DEFINITION

3 Dynamic testing of DC/DC converters Available solutions on the market

4 Sean Kenney DESIGN GOALS

5 To design/build an active load with the following qualities: – Wide voltage compliance range – Very fast stepping rate – Wide range of settable currents – Unconditionally stable

6 HARDWARE IMPLEMENTATION Mark Thomas

7 Implementation Phases for Each Sub-Circuit

8 Implementation Process Research Solutions Choose Solution Design Solution Test Components Design Review Prototype Construction Prototype Testing Final Design Review PCB Implementation

9 Sub-Circuits and Components Power DAC – Power DAC Current Sinking FET Network – Current Sense – Voltage Sense Power Management – Voltage Regulators Thermal Measurement – Current Source – High Accuracy Differential Amplifier Miscellaneous – Op Amp Buffers to Provide Circuit Isolation – MOSFET Switches – Pull-up/down Resistors

10 Brian Sicard

11 DEVELOPMENT PHASES

12 FAMILIARIZATION Purpose of Familiarization Phase MSP430 Development Tools Development Software

13 ALGORITHMS Familiarization++

14 Brian Sicard

15 TEST PHASES

16 TEST MOTIVATION Component/Device Behavior Sub-Circuit Functionality Algorithm Functionality Sub-Circuit Functionality W/Algorithms Total Design Functionality Prototype Functionality

17 Sean Kenney ESTIMATED TIMELINE

18

19 Sean Kenney BUDGET ESTIMATE

20 Total Budget Estimate: $596.14 Budget covered by Linear Technology


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