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The Fastest Flash Programmer on the Planet

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Presentation on theme: "The Fastest Flash Programmer on the Planet"— Presentation transcript:

1 The Fastest Flash Programmer on the Planet
BPM Flashstream The Fastest Flash Programmer on the Planet

2 Company Mission Statement
BPM Microsystems' mission is to make it easy for our customers to program semiconductors with the highest quality at a competitive cost per device © 2007 BPM Microsystems

3 History of Revolutionary Products
1992 AMD high speed PLDs cause ground bounce and cannot be programmed BP-1200 solves problem 1994 Altera EPLDs ramps volume but causes programming bottleneck BP-2100 solves problem 1996 fine pitch TSOP devices ramp up in volume but bent leads cause problems BP-4100 solves problem © 2007 BPM Microsystems

4 Flash Forecast 2007 problem: flash programmers unable to keep up with flash shipments Source: IC Insights © 2007 BPM Microsystems

5 © 2007 BPM Microsystems

6 Introducing Flashstream
Fastest flash programmer on the planet Fastest payback in the industry Fastest way to capture your competitors’ market share! © 2007 BPM Microsystems

7 Designed for High Density Flash
Programs NAND and NOR Flash Programs 4 devices in one programming cycle Bad block replacement scheme for NAND flash Low voltage support © 2007 BPM Microsystems

8 System Specifications
Maximum density 32Gb 32.7Gb memory per site Upgradeable memory to handle future densities © 2007 BPM Microsystems

9 Fastest on the Market 12 times faster than current 2710 technology for Samsung OneNAND™ KFG1216Q2A-DEB5 *Times are for quantity 4 of 512Mb Samsung OneNAND™ KFG1216Q2A-DEB5 with operations of erase, program, verify with random data pattern. **Times listed are for specific device. Results will vary based on device characteristics © 2007 BPM Microsystems

10 Serial NOR Flash Speed 7 times faster on erase, program, verify than current technology for SST25VF016B 61 times faster on verify function alone © 2007 BPM Microsystems

11 Compared to Competition
Average programming time on Flashstream compared directly to nearest competitor: NAND flash memory - over 5 times faster Serial flash memory - over 9 times faster NOR flash memory - over 1.6 times faster © 2007 BPM Microsystems

12 Flashstream Comparison Times
Published programming times are full data patterns with no account of handling time. Programming times of Flash devices are typically linear in nature. The times listed here are full data patterns. Customers usually are only programming a fraction of the device. So if a customer is programming only 20% of a device you can multiply that by the listed programming time to get a better estimate. © 2007 BPM Microsystems

13 Times include 100% of chip programmed on 4 sockets
NAND Fastest Times 2Gb in 31.1 seconds 1Gb in 19.8 seconds 512Mb in 11.1 seconds Times include 100% of chip programmed on 4 sockets © 2007 BPM Microsystems

14 Vector Engine Technology
Provides the lowest possible programming overhead compared to theoretical minimum Utilizes proprietary co-processor design to hardware accelerate flash memory waveforms Enables peak verify bandwidth at 800 Mb/s (20ns cycle) on 4 devices simultaneously © 2007 BPM Microsystems

15 Vector Engine Technology
Tester derived technology platform Faster speeds achieved through synchronous operation In most cases, programs at the theoretical limits of the silicon design, the faster the device, the faster the device is programmed. Ready for future devices © 2007 BPM Microsystems

16 Scalable Design Multiple Flashstream units can be connected to one computer to run the same programming job in concurrent programming™ mode Single units can be mechanically connected LED display identifies programmer number that corresponds to software instructions USB 2.0 Interface © 2007 BPM Microsystems

17 Flashstream Socket Cards
Can program with one, two, three or four socket cards Only single socket card purchase for first article qualification Easy to remove and store with less space Active, Pass and Fail LED status indicators on each individual socket card Auto-start on continuity check option Controlled impedance path for signal integrity © 2007 BPM Microsystems

18 Flashstream Device support
2800F support from 150 devices at shipment Aug 1 to 490 currently for 11 different semiconductor manufacturers We are supporting new devices at no charge with purchase of equipment. This no charge support is only for devices that have a socket card developed to support that semiconductor package. If a new socket card needs to be designed, then a development charge will apply. All devices supported by 2800F are supported on HelixFS and 3000FS products. © 2007 BPM Microsystems

19 Data Integrity Zero overhead CRC32 verifies backing store data during each program and verify cycle Socket cards utilize connector with ground blade to provide controlled impedance path from Pin Driver to DUT Program and Erase cycles are controlled by DUT. Flashstream speeds programming by eliminating dead times but does not change internal DUT timing. © 2007 BPM Microsystems

20 BPWin Drives Flashstream
Utilizes standard BPWin software which controls all BPM products Integrates existing jobmaster files Production friendly security and job setup Full control of programming jobs 1 year software warranty included © 2007 BPM Microsystems

21 Rugged Design Rigid aluminum chassis Modular design
Robust production environment platform 1 year hardware warranty included © 2007 BPM Microsystems

22 Helix FS Automated Desktop Automated programming system
800 Devices per hour 2 Flashstream programming sites and 8 sockets Interchangeable with Universal programming sites © 2007 BPM Microsystems

23 3000FS Automated High volume programming system
1100 Devices per hour handler speed 4 Flashstream programming sites and 16 sockets Tape, tube, or tray input/output, with laser marking or labeling © 2007 BPM Microsystems

24 Flashstream Update What customers are saying?
“You smoked the SG T9600” in a comparison test with a System General T9600 290 seconds versus 12 seconds with Flashstream When one customer switched from a 2710 to a Flashstream, programming time went from 420 seconds to 7 seconds on a 4Gb NAND part We are looking for more quotation like these; please get an agreement for endorsement at the time of the sale. © 2007 BPM Microsystems

25 New for BPWin 4.72 New for 4.72 November 11, 2007 BPWin release
Serialization on 2800F for 4.72 Both simple and complex serialization is available on all 4 sockets Improved Bad Block management new tool for 4.72 Now 80% of Bad Block Management Scheme’s can be duplicated without a custom algorithm Faster Programming on newer technology NAND Improved STMicro Large Page Family 1Gb from 37.2 to 19.8 seconds – Vector engine compatible with factory cache mode All NAND options selections are saved inside the jobmaster file. It is important to understand that a custom algorithm will trigger a need to charge on any changes in the future. NAND memory is a commodity and users often wish to choose a lower priceThe custom bad block scheme cannot be transferred to another device without triggering a charge. © 2007 BPM Microsystems

26 Bad Block Management Scheme
5 basic elements to a Bad Block Management Scheme (BBM) Bad Block Replacement (BBR) Strategy Partitioning Error Correcting Code (ECC) algorithm Spare Area Placement Free Good Block Formatting There are really no “standard” bad block management schemes. Competitors use different combinations and calls them schemes, but they are really customer specific settings are not considered a standard in any sense of the word. © 2007 BPM Microsystems

27 NAND options – Bad Block Replacement (BBR)
Skip Bad Blocks - In this strategy, the replacement block is simply the next good physical block following the bad block in ascending order. This is the most common strategy when bulk pre-programming, and is best in terms of throughput (DPH) in the bulk pre-programming process. Reserve Block Area - This utilizes a specially reserved "reservoir" of blocks, generally at the end of the NAND device, to be used as replacements for Bad Blocks that are encountered in the main partitions, called the User Block Area (UBA). When a Bad Block is encountered during programming, the data pattern content originally destined for it is instead programmed into one of the Good Blocks in the RBA reservoir. Since this strategy is not linear in nature, a table must be maintained that maps Bad Blocks to the RBA replacement block. © 2007 BPM Microsystems

28 High performance socket modules
Load cycles of 50,000 insertions for only about 50% more in cost over a standard socket card Currently only available for 0.8 pitch BGA’s under 169 pins. Other BGA pitches will be available soon. Designed specifically for lead-free BGA devices © 2007 BPM Microsystems

29 Problem Solved Fastest programming times
Enables new applications, especially for very large patterns Reduces costs associated with product using NAND Flash © 2007 BPM Microsystems

30 Thank You !


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