1. Tier 1 Breakout Topics How to study a 100,000-core system (yes that is 100K) using RAMP technologies? Krste What "great" research questions can RAMP help answer? What are the RAMP grand challenges? James vs. Dave What are the standard distribution target machines? In what form should they be distributed?

2. Tier 2 Breakout Topics What are the technical obstacles in using commercial IPs in RAMP systems? (E.g., how to incorporate IPs with predefined timing behaviors when using RAMPs abstracted inter-module interface.) What capabilities are needed in the monitor/logging/debugging facilities for RAMP HW and SW development?

3. Tier 2 Breakout Topics How can FPGA and FPGA tools be "improved" to help RAMP? What are requirements and steps to have a successful roll-out of RAMP HW/SW? (E.g., how will the rollout of RAMP HW/SW be coordinated? How will the inevitable bitrot that develops overtime be addressed?)

4. New Topics functional vs timing: 1 combined infrastructure? or better to do separately? 100,000 cores –hardware virtualization, how to mimic many more CPUs/memory/disks than actually available –How would one develop software for a system with 1K+ processors? Rollout –How will the rollout of RAMP HW/SW be coordinated? –How will the inevitable bitrot be addressed that will inevitably develop over time?

5. New Topics Research problems –RAMP tools and infrastructure for non-architecture research (OS, languages, etc) –How can I use RAMP hardware to estimate the power/energy implications of my hardware and software tradeoffs? –Operation system research issues for a system with 1K+ processors?

7. Breakout Topics 1 st Tier How to study a 100,000-core system (yes that is 100K) using RAMP technologies? –hardware virtualization, how to mimic many more CPUs/memory/disks than actually available What "great" research questions can RAMP help answer? What are the RAMP grand challenges? –How can I use RAMP hardware to estimate the power/energy implications of my hardware and software tradeoffs? –How would one develop software for a system with 1K+ processors? –Operation system research issues for a system with 1K+ processors? What are the standard distribution target machines? In what form should they be distributed?

8. Breakout Topics 2 nd Tier What are the technical obstacles in using commercial IPs in RAMP systems? –how to incorporate IPs with predefined timing behaviors when using RAMPs abstracted inter- module interface.) –How will the inevitable bitrot be addressed that will inevitably develop over time? What capabilities are needed in the monitor/logging/debugging facilities for RAMP HW and SW development?

9. Breakout Topics 2 nd Tier How can FPGA and FPGA tools be "improved" to help RAMP? What are requirements and steps to have a successful roll-out of RAMP HW/SW? (E.g., how will the rollout of RAMP HW/SW be coordinated? How will the inevitable bitrot that develops overtime be addressed?) –RAMP tools and infrastructure for non-architecture research (OS, languages, etc)

10. New Topics