1. Survey of Packet Classification Algorithms

2. Outline Background and problem definition Classification schemes – One dimensional classification – Two dimensional classification

3. Background

4. Flow-aware vs. Flow-unaware Routers Flow-aware router – Keep track of flows and perform similar processing on packets in a flow Flow-unaware router – Packet-by-packet router – Treat each incoming packet individually

5. Why Flow-aware Router? Additional mechanisms required – Admission control, resource reservation, per-flow queueing, fair scheduling etc. Provision of DiffService in ISPs – Capability to distinguish and isolate traffic belonging to different flows based on negotiated service agreements Classification Rules or Policies

6. Need for DiffService Service  Traffic shaping  Traffic filtering  Policy routing ISP1 NAP E1 E2 ISP2 ISP3 Z X Y

7. More Value ­ added Services DiffService – Regard traffic from Autonomous System #33 as `platinum ­ grade ’ Accounting and billing – Treat all video traffic as highest priority and perform accounting for this type of traffic Committed access rate (rate limiting) – Rate limit WWW traffic from sub ­ interface#739 to 10Mbps

8. Flow-aware Router -Basic Architectural Components Special processing Control Datapath: per-packet processing Routing lookup Routing, resource reservation, admission control Packet classification Switching Scheduling

9. Flow Classification Forwarding Engine Flow Classification HEADERHEADER Flow Index Classifier (Policy Database) PredicateAction Incoming Packet

10. Classful Addresses 0 10 110 NetworkHost Network Host Class A Class B Class C 724 218 1416 Every address was class A or B or C, easily determined by the first three bits of the address

11. Classless InterDomain Routing (CIDR) Prefix can be of arbitrary length 208.12.16/24 208.12.21/24208.12.31/24 0 2 32 -1 Total IPv4 address space  Prefix ranges 208.12.21/24 02 32 -1 Total IPv4 address space 208.12.16/20 These addresses match both prefixes  An exception prefix

12. Table Growth of a Backbone Router From http://www.telstra.net/ops/bgptable.html

13. Prefix Length Distribution

14. Problem Definition- Packet Classification

15. Given a classifier C with N rules, Rj, 1  j  N, where Rj consists of three entities – A regular expression Rj[i], 1  i  d, on each of the d header fields, – A number, pri(Rj), indicating the priority of the rule in the classifier, and – An action, referred to as action(Rj)

16. Classification is a Generalization of Lookup Classifier = routing table One-dimension (destination address) Rule = routing table entry Regular expression = prefix Action = (next-hop-address, port) Priority = prefix-length

17. Metrics for Classification Algorithms Speed Storage requirements Low update time Ability to handle large classifiers Flexibility in implementation Low preprocessing time Scalability in the number of header fields Flexibility in rule specification

18. One Dimensional Packet Classification – IP Address Lookup Algorithms

19. Binary Tries Prefixes a 0* b 01000* c 011* d 1* e 100* f 1100* g 1101* h 1110* i 1111* ad c b e hifg 0 0 0 0 0 0 0 00 1 1 1 1 1 11

20. Path-Compressed Trie Prefixes a 0* b 01000* c 011* d 1* e 100* f 1100* g 1101* h 1110* i 1111* ad ec hifg 0 0 0 00 1 1 1 1 11 b 0 1 32 3 4 4 Legend: x indicates to inspect which bit

21. Disjoint-prefix Binary Trie Prefixes a 0* b 01000* c 011* d 1* e 100* f 1100* g 1101* h 1110* i 1111* c b e hifg 0 0 0 0 0 0 0 00 1 1 1 1 1 11 a1a1 0 a3a3 1 a2a2 1 d1d1 1  Leaf pushing  Disjoint prefixes do not overlap  No prefix is itself a prefix of another

22. Variable-stride Multibit Trie a c 0110 add 0011 c b ihgfe 00 01 01 0110 11 00 11 0110 stride=2 stride=1 Prefixes a 0* b 01000* c 011* d 1* e 100* f 1100* g 1101* h 1110* i 1111*  Reduced number of memory accesses  Greater wasted space

23. Caching Addresses CPU MAC Local Buffer Memory Line Card DMA MAC Local Buffer Memory Fast Path Slow Path Advantages  Increased average lookup performance Disadvantages  Decreased locality in backbone traffic  Cache size  Cache management overhead  Hardware implementation difficult Line Card Local Buffer Memory Line Card DMA MAC Buffer Memory

24. Hash-based Scheme Store a hash table for each prefix length Hash key is the prefix value and prefix length Search scheme – Linear search on prefix lengths – Binary search on prefix lengths Need to provide intermediate markers – Guide to more specific prefix Need precomputation per marker – Avoid backtracking

25. Linear Search on Prefix Lengths Prefixes a 0* b 01000* c 011* d 1* e 100* f 1100* g 1101* h 1110* i 1111* j 01* k 1100001* p 101* ad j c b e hifg 0 0 0 0 0 0 0 00 1 1 1 1 1 11 p 1 0 0 k 1 1 3 2 5 7 6 4 Linear search on length

26. Binary Search on Prefix Lengths Prefixes a 0* b 01000* c 011* d 1* e 100* f 1100* g 1101* h 1110* i 1111* j 01* k 1100001* p 101* ad j c b e hifg 0 0 0 0 0 0 0 00 1 1 1 1 1 11 p 1 0 0 k 1 1 3 2 5 7 6 4 Binary search on length

27. Lookups with Ternary-CAM Memory array Priority encoder Next-hop memory Next-hop TCAMRAM 0 1 2 3 M 0 1 0 0 1 Destination Address

28. Lookups with Ternary-CAM Advantages – Suitable for multiple fields – Fast: 16-20 ns (50-66 Mpps) – Simple to understand Disadvantages – Inflexible: range-to-prefix blowup – Density: largest available in 2000 is 32K x 128 (but can be cascaded) – Management software, and on- chip logic: non-trivial complexity – Power: 5-8 W – Incremental updates: slow – DRAM-based CAMs: higher density but soft-error is a problem – Cost: $30-$160 for 1Mb

29. Two Dimensional Packet Classification

30. Set-pruning Tries RuleDASA R10*10* R20*01* R30*1* R400*1* R500*11* R610*1* R7*00* Dimension SA Dimension DA     R7R2R1R5R7R2R1 R3 R7 R6 R7 R4

31. Hierarchical Tries Dimension DA    Dimension SA R5R2R1 R3 R6 R7 R4 RuleDASA R10*10* R20*01* R30*1* R400*1* R500*11* R610*1* R7*00*

32. Grid-of-Tries Dimension DA   Dimension SA R5R2R1 R3 R6 R7 R4     RuleDASA R10*10* R20*01* R30*1* R400*1* R500*11* R610*1* R7*00*

33. Grid-of-Tries – cont. Advantages  Good solution for two dimensions Disadvantages  Static solution  Not easily extensible to more than two dimensions 20K entries: 2MB, 9 memory accesses (with expansion)

34. Bitmap-intersection R4 R3 R2 R1 1 1 0 0 1 0 1 1 R3 R4 R1 R2

35. Bitmap-intersection – cont. Advantages  Good solution for multiple dimensions, for small classifiers Disadvantages  Static solution  Large memory bandwidth (scales linearly in N)  Large amount of memory (scales quadratically in N)  Hardware-optimized 512 rules: 1Mpps with single FPGA (33MHz) and five 1Mb SRAM chips

36. Cross-producting R4 R3 R2 R1 5 4 3 2 1 6 217894563 P1 P2 (1,3) (8,4)

37. Cross-producting – cont. Advantages  Fast accesses  Suitable for multiple fields Disadvantages  Large amount of memory  Need caching for bigger classifiers (> 50 rules) 50 rules: 1.5MB, need caching (on-demand cross- producting) for bigger classifiers Need: d 1-D lookups + 1 memory access, O(N d ) space