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**Fast Incremental Updates on Ternary-CAMs for Routing Lookups and Packet Classification**

August 17, 2000 Hot Interconnects 8 Devavrat Shah and Pankaj Gupta Department of Computer Science Stanford University {devavrat,

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**Unicast destination address based lookup**

Lookup in an IP Router HEADER Dstn Addr Forwarding Engine Next Hop Next Hop Computation Forwarding Table Dstn-prefix Next Hop ---- ---- ---- ---- Incoming Packet ---- ---- Unicast destination address based lookup

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**IP Lookup = Longest Prefix Matching**

Next-hop 100/9 103.23/16 /23 101.20/13 101.1/16 Forwarding Table Find the longest prefix matching the incoming destination address

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**Requirements of a Route Lookup Scheme**

High Speed : tens of millions per sec Low storage : ~100K entries Fast updates: few thousands per second, but ideally at lookup speed

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Route Lookup Schemes Various algorithms : come to tutorial tomorrow if interested This paper is about ternary CAMs

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**Content-addressable Memory (CAM)**

Fully associative memory Exact match (fixed-length) search operation in a single clock cycle TCAM: stores a 0, 1 or X in each cell: useful for wildcard matching

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**Route Lookup Using TCAM**

Location Prefix Next-hop 1 P1 /23 1 P2 1 103.23/16 P3 101.1/16 2 Priority Encoder P1 P4 101.20/13 3 P5 4 100/9 5 6 To find the longest prefix cheaply, need to keep entries sorted in order of decreasing prefix lengths

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**General TCAM Configuration For Longest Prefix Matching**

32 bit Prefixes 31 bit Prefixes 30 bit Prefixes Prefix-length ordering constraint (PLO) 10 bit Prefixes 9 bit Prefixes 8 bit Prefixes

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**Incremental Update Problem**

Updates: Insert a new prefix Delete an old prefix Problem: how to keep the sorting invariant (e.g., the PLO) under updates

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Target Update Rate ? Many are happy with a few hundred thousand per second Others want (and claim) single clock-cycle updates Our goal: make them as fast as possible (ideally single-cycle)

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Common Solution: O(N) 32 bit Prefix 31 bit Prefix Add new 30-bit prefix 30 bit Prefix M N 10 bit Prefix Problem: How to manage the empty space for best update time and TCAM utilization? 9 bit Prefix 8 bit Prefix Empty Space

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**Better Average Update Rate**

32 bit Prefix 31 bit Prefix Add new 30-bit prefix 30 bit Prefix 9 bit Prefix 8 bit Prefix Worst case is still O(N)

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**An L-solution (L=32) Two prefixes of same length can be in any order**

32 bit Prefix 31 bit Prefix Add 30 bit Prefix Two prefixes of same length can be in any order 10 bit Prefix 9 bit Prefix 8 bit Prefix Empty Space

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**Routing Table for Simulation**

Mae-East Entries 43344 Insertion 34204 Deletion 4140 Snapshot + 3-hour updates on the original table Source: - March 1, 2000

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**Performance of L-solution**

Avg #memory writes # Entries

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**Outline of Rest of the Talk**

Algorithm PLO_OPT: worst case L/2 memory shifts (provably optimal) Algorithm CAO_OPT: even better (conjectured to be optimal)

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**PLO_OPT Worst-case L/2 Add 32 bit Prefix 31 bit Prefix 21 bit Prefix**

Empty Space 20 bit Prefix Worst-case L/2 9 bit Prefix 8 bit Prefix

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PLO_OPT (MAE-EAST)

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**Better Algorithm ? PLO_OPT is optimal under the PLO constraint**

Question: can we relax the constraint and still achieve correct lookup operation?

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**Yes: PLO Constraint is More Restrictive Than Needed**

31 Maximal chain P2 has no ordering constraint with P3 or P4 P4 < P3 < P1, P2 < P1 Chain ancestor Ordering Constraint P3 29 P1 10/8 P2 10.64/15 P3 /29 P4 /31 P2 15 8 P1

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Algorithm CAO_OPT Maintain free space pool in the “middle” of the maximal chain Basic idea: for every prefix, the longest chain that this prefix belongs to should be split around the free space pool as equally as possible

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**CAO_OPT: Example P4 < P3 < P1, P2 < P1 P4 P2 P3 P1 P1 10/8 P2**

10.64/15 P3 /29 P4 /31 P4 < P3 < P1, P2 < P1 P1

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CAO_OPT: Updates Insertion : find the maximal chain to which new entry belongs and insert it such that this chain is distributed as equally as possible around the free space : D/2 operations Deletion : reverse operation with update possibly using another chain

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**Auxiliary Data Structure**

Trie of prefixes with two additional fields per node Update operation takes L memory writes in software and D/2 in TCAM

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**Maximal-chain Length (D) Distribution**

Number of chains Chain Length

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CAO_OPT (MAE-EAST) Avg #memory writes # Entries

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**Summary of Simulation Results**

Algorithm CAO_OPT PLO_OPT L-soln Mean 1.015 4.098 7.27 Variance 0.01 2.03 4.09 Worst Case 3 12 21 Hence, can achieve 1-2 cycle updates

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