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Global Flow Optimization (GFO) in Automatic Logic Design “ TCAD91 ” by C. Leonard Berman & Louise H. Trevillyan CAD Group Meeting Prepared by Ray Cheung.

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Presentation on theme: "Global Flow Optimization (GFO) in Automatic Logic Design “ TCAD91 ” by C. Leonard Berman & Louise H. Trevillyan CAD Group Meeting Prepared by Ray Cheung."— Presentation transcript:

1 Global Flow Optimization (GFO) in Automatic Logic Design “ TCAD91 ” by C. Leonard Berman & Louise H. Trevillyan CAD Group Meeting Prepared by Ray Cheung

2 CAD Group Global Flow Optimization in Automatic Logic Design 2 Outline Introduction Background and Definitions Min-Cut Main Results Discussion & Conclusions

3 CAD Group Global Flow Optimization in Automatic Logic Design 3 Introduction Machine becomes more complex  more logic  Use local pattern matching to improve a circuit.  Moving signal connections from one gate to another or by deleting connection. Advantage – Efficiency, Effectiveness Disadvantage – Miss global information (only view at small logic windows) Main spirit of the GFO paper  Use global flow analysis  Gather and utilize information from the entire circuit.  Especially faster than local transformation for large circuits.  Present how to use this global information to simplify logic.  Supply a firm theoretical foundation.

4 CAD Group Global Flow Optimization in Automatic Logic Design 4 Background & Definitions Given a circuit C which have function F, which associate with every wire w, F(w). Rearrange the connection points of w such that F(w) does not change. Use data flow analysis, compute a quick approx. to F(w) and then construct a weighted, directed graph.  Every cut of the graph corresponds to a set of connection points for w.  The cost of cut equals to the number of connection points of w in the new circuit.

5 CAD Group Global Flow Optimization in Automatic Logic Design 5 Definitions All the logic is combinational and all functional nodes are single-output NOR ’ s. If a signal i is an input to node j, we write i  j If there is a path from node i to node j, we write i  j which means j is reachable from i.

6 CAD Group Global Flow Optimization in Automatic Logic Design 6 Definitions The set of immediate successors of a signal s as  sink(s) = {t: s  t} The set of immediate predecessors of s as  input(s) = {t: t  s}

7 CAD Group Global Flow Optimization in Automatic Logic Design 7 Definitions If n is a node in C and S is a subset of nodes of C, then “n is blocked by S” if every path beginning at a sink of n and ending at an output contains a node of S.

8 CAD Group Global Flow Optimization in Automatic Logic Design 8 Definitions For each wire, x  C, there are four sets of wires, forcing sets.  F ij (x) = {s: if x = i then s = j}, i,j  {0,1}  Below shows F 10 = {n 1, n 2, n 3, n 4, n 8, n 9, n 12, n 13, n 18 }  There are F 00, F 01, F 10 and F 11

9 CAD Group Global Flow Optimization in Automatic Logic Design 9 Lemma 1 If i  F 10 (s) and there is no path i  s, then s may be connected as an input to node i without changing the function. No path from i to s, therefore still DAG after reconnect. If s = 0, no problem, since they are all NOR gate, 0 is non-controlling value of NOR gate. If s = 1, since i  F 10 (s), therefore no change.

10 CAD Group Global Flow Optimization in Automatic Logic Design 10 Lemma 2 If s is connected to node j in C and j is blocked by sinks(s) then the connection of s at j can be replaced by the constant 0 without changing the function of C. If s = 0, two circuit equivalent. If s = 1, since all NOR gate which s is connected. Therefore, there is no difference.

11 CAD Group Global Flow Optimization in Automatic Logic Design 11 Definitions A frontier node is defined as from this node to any primary output, there exists a path which does not contain a node in F 10 or F 11. i.e. the far-most node close to PO. E.g. {n 8, n 9, n 12, n 13 }

12 CAD Group Global Flow Optimization in Automatic Logic Design 12 S-frontier of i S = { S 1, …, S n } be a set indexed by the nodes of C, and let S i be a set of nodes of C. This is summary information. S-frontier of i denoted as  c (i,S)  Element of  c (i,S) are nodes j such that j  S i There is a path j  j 1  j 2 …  OUTPUT such that for no j l  S i ; j is reachable in the circuit from i.

13 CAD Group Global Flow Optimization in Automatic Logic Design 13 Theorem 3 Let C be a circuit, and s a wire in C. Let F 10 be the forcing set defined earlier, and let D be a set for which sink(s)  D  F 10 (s) and such that for no d  D is there a path d  s. If C ’ is identical to C except that in C ’, signal s is an input only to those nodes in  c (s,D), then C  C ’. Figure on the left side is C, and C ’ on the right side. Use Lemma 1 and Lemma 2 and the definition of  c

14 CAD Group Global Flow Optimization in Automatic Logic Design 14 Corollary 4 Let C and C’ be two circuits which are identical except in the set of gates to which one wire s, is an input. Let F 10 and F’ 10 be the two forcing sets for C and C’, respectively. Assume sink(s)  D  F 10 (s) and sink(s)  D’  F’ 10 (s). If  c (s,D) =  c’ (s,D’) then C  C’. In the figure below, C  C’.

15 CAD Group Global Flow Optimization in Automatic Logic Design 15 Alter connection of signal s Determine a set N s of nodes of C such that n  N s with three properties.  There is no path n  s.  Node n is blocked by  c (s,D).  If C is changed to C’ in which s is connected only at the nodes of N s,  c (s,D) =  c’ (s,D) Properties 1 and 2 are easy to determine. But finding the minimal set of nodes which satisfies property 3 is NP- Hard – we call it N s problem. Efficient method (min-cut) to find an approximate solution to the N s problem. Other approach is Linear programming.

16 CAD Group Global Flow Optimization in Automatic Logic Design 16 Construction of G s Add Nodes  Source node labeled SOURCE with inf weight.  Sink node labeled SINK with inf weight.  For each i  C 10 (s) which is reachable from s, add node(i) with weight = 1.  For each node i, blocked by  (s,C 10 ), from which s is not reachable, add node(i) with weight = 1. Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO For each node(k) with k   (s,C 10 ), add an edge from k to the sink.

17 CAD Group Global Flow Optimization in Automatic Logic Design 17 Construction of G s Add Nodes  Source node labeled SOURCE with inf weight.  Sink node labeled SINK with inf weight.  For each i  C 10 (s) which is reachable from s, add node(i) with weight = 1.  For each node i, blocked by  (s,C 10 ), from which s is not reachable, add node(i) with weight = 1.

18 CAD Group Global Flow Optimization in Automatic Logic Design 18 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

19 CAD Group Global Flow Optimization in Automatic Logic Design 19 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

20 CAD Group Global Flow Optimization in Automatic Logic Design 20 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

21 CAD Group Global Flow Optimization in Automatic Logic Design 21 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

22 CAD Group Global Flow Optimization in Automatic Logic Design 22 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

23 CAD Group Global Flow Optimization in Automatic Logic Design 23 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

24 CAD Group Global Flow Optimization in Automatic Logic Design 24 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

25 CAD Group Global Flow Optimization in Automatic Logic Design 25 Construction of G s Add Edges  SET = {  (s,C 10 )}  DO WHILE SET is not EMPTY In reverse breadth first order, choose and remove i from SET A. Choose k  {inputs(i)} for which –k  C 10 –node(k)  G s –  l  {inputs(k)} node(l)  G s B. For k found in A above –Remove node(k) from G s –  l  {inputs(k)}: add edge(l,I)to G s, add node(l) to SET. If no such k exists, add edge (SOURCE, i)  End DO

26 CAD Group Global Flow Optimization in Automatic Logic Design 26 Construction of G s For each node(k) with k   (s,C 10 ), add an edge from k to the sink.

27 CAD Group Global Flow Optimization in Automatic Logic Design 27 Derived Flow graph Add a source node (src) and sink node (snk). For each node in F 10, add node in flow graph with weight 1.

28 CAD Group Global Flow Optimization in Automatic Logic Design 28 Max-Flow Min-Cut Technique Edmonds-Karp: O(|V||E| 2 ) Ford & Fulkerson: O(|E||f|) Note: For unit capacity, |f|  |V|, so O(|V||E|) time. st a b cd st a b cd 11/16 12/13 101/497/7 12/12 19/20 4/4 11/14 min-cut = max-flow

29 CAD Group Global Flow Optimization in Automatic Logic Design 29 Theorem 5 Let K be any node cut separating the source and sink in G s, and let C’ be a circuit which is identical to C except that the sinks of signal s are precisely those nodes which are cut by K, then  c (s,C 10 ) =  c’ (s,C 10 ). Proof Theorem 5 needs Lemma 6, 7, 8. Theorem 5 allows us to rearrange the connections of signal s without changing the circuit functionality.  Given a circuit C, and wire s, construct G s  Use min-cut algorithm to find a node cut of G s.  Rearrange the connections of s based on the cut-set & Theorem 3.

30 CAD Group Global Flow Optimization in Automatic Logic Design 30 Lemma 6 Every gate in C corresponding to a node in G s is blocked by  (s,C 10 ).

31 CAD Group Global Flow Optimization in Automatic Logic Design 31 Lemma 7 In G s, every node corresponding to a gate in  (s,C 10 (s)) is reachable from the SOURCE.

32 CAD Group Global Flow Optimization in Automatic Logic Design 32 Lemma 8 Every gate in C’ which corresponds to a node in G s which is reachable from K is in C 10 (s).  If the longest path from K to a node is 0, then s will be the direct input of this node, there it is in C 10 (s).  Assume it is true for the nodes of distance less than i+1  When the node n of distance is i+1, By the construction of G s, it implies One of the input to n is in C 11 (s) Therefore, n  C 10 (s)

33 CAD Group Global Flow Optimization in Automatic Logic Design 33 Theorem 9 Let K be any cut separating SOURCE and SINK in G s, then let C and C’ be related as in Theorem 5, then C  C’. Theorem 5 shows two Frontier are the same. Theorem 9 shows two circuit are the same. We have the following - Connection Optimization Procedure PROC: OPTCON; /* OPTimize CONnections */  FOR EACH SIGNAL CONSTRUCT G s ; FIND MINIMAL CUT, K; CREATE C’ AS IN THEOREM 9; C = C’;  END; END OPTCON;

34 CAD Group Global Flow Optimization in Automatic Logic Design 34 Results The flow graph has the following property. If the source node is re- connected to the corresponding nodes in the cut-set, the circuit is unchanged. Therefore, the problem finding minimum number of nodes (fan-outs of s), can be solved by finding a minimum cut-set in the flow graph. Cut-set reduce the fanouts from 6 to 3.

35 CAD Group Global Flow Optimization in Automatic Logic Design 35 Conclusions Present a new approach to logic optimization. Use global flow analysis to gather information about the relationships between wires. Use network flow to optimize the circuit. Decreasing the number of fan-out nodes. Is there any better approx. than recurrences approx.? We can use Linear programming technique to replace min- cut technique. Another ICCAD2000 paper introduced “ Implication Flow Graph ” based on GFO. Because it has a larger solution space than GFO, and for the previous example, IFG can reduce the fanout of s from 6 to 2.

36 CAD Group Global Flow Optimization in Automatic Logic Design 36 The End Please feel free to ask any question !


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