3External Devices can be group into three categories: Human readable: Appropriate for communicating with the computer user.Screen, printer, keyboardMachine readable: Appropriate for communicating with the equipment.Monitoring and controlCommunication: Appropriate for communicating with remote devices.ModemNetwork Interface Card (NIC)
4Block Diagram for External Devices Control signals: Establish the function that the device will execute.Status signal: Indicates the state of the device.Control logic: Connected with the device controls ; the device’s operation in response to direction from the I/O module.Transducer: Converts data from electrical to other forms of energy through output and from other forms to electrical through input.Buffer: Associated with the transducer to temporarily hold data being transferred between the I/O module and the external environment ; it is very often 8 to 16 bits.Data bits: In the form of a set of bits are the data , and it is sent to or received from the I/O module.
5Major functions for an I/O module: I/O ModulesMajor functions for an I/O module:1. Control and Timing: To organize the flow of interchange between internal resources and external devices.2. Processor Communication: Includes command decoding , data exchange , status reporting , address recognition.3. Device Communication: This communication contains commands , status information , and data.4. Data Buffering: It is the fundamental assignment of an I/O module.5. Error Detection: It is usually a responsibility of the I/O module to report errors to the CPU.
6The control of the transfer of data from an external device to the processor consists in the following steps:Processor interrogates I/O module to verify the condition of the device connected.I/O module informs the situation of the installed device .If the device is prepared to transmit, the processor asks data transfer.I/O module achieves a unit of data such as 8 or 16 bits from the external device.Data are moved from the I/O module to the processor.Variations for output, Direct Memory Access, and so on.I/O Modules
8I/O module communicates with the processor: I/O ModulesI/O module communicates with the processor:Command decoding: The I/O module accepts commands from the processor.Data: Data are exchange between the processor and the I/O module over the data busStatus reporting: Due to peripherals are so slow , it is important to know the status of the I/O module.Address recognition: As each word of memory has an address , so does each I/O device.
9Programmed I/O The processor has direct control over I/O. Sensing statusRead/write commandsTransferring data2. The processor waits for I/O module to complete operation.3. With programmed I/O , data are exchange between the processor and the I/O module.
10Programmed I/O Steps The processor requests I/O operation. I/O module performs operation.I/O module sets status bits.The processor checks status bits periodically.I/O module does not inform the processor directly.I/O module does not interrupt the processor.The processor may wait or come back later.
11Interrupt Driven I/OWith this interrupt , the processor issues an I/O command and continues to execute other instructions ; but is interrupted by the I/O module when the latter has completed its work.Overcomes the processor waiting.The processor does not repeat checking of device.4. This interrupt is used when an I/O to memory transfer occurs across the processor.
12Interrup Driven I/O Basic Operation CPU issues read command I/O module gets data from peripheral while CPU does other workI/O module interrupts CPUCPU requests dataI/O module transfers dataCPU ViewpointIssue read commandDo other workCheck for interrupt at end of each instruction cycleIf interrupted:-Save context (registers)Process interruptFetch data & storeSee Operating Systems notes
14Design issues -How do you identify the module issuing the interrupt? -How do you deal with multiple interrupts?i.e. an interrupt handler being interrupted
15Identifying Interrupting Module 1.Multiple interrupt lines-PC-Limits number of devices2. Software poll-CPU asks each module in turn-Slow3. Daisy Chain or Hardware poll-Interrupt Acknowledge sent down a chain-Module responsible places vector on bus-CPU uses vector to identify handler routine4. Bus Master-Module must claim the bus before it can raiseinterrupt
16Multiple Interrupts Each interrupt line has a priority Higher priority lines can interrupt lower priority linesIf bus mastering only current master can interrupt
1782C59A Interrupt Controller Example - PC Bus80x86 has one interrupt line8086 based systems use one 8259A interrupt controller8259A has 8 interrupt linesSequence of Events8259A accepts interrupts8259A determines priority8259A signals 8086 (raises INTR line)CPU Acknowledges8259A puts correct vector on data busCPU processes interrupt
18Direct Memory AccessInterrupt driven and programmed I/O require active CPU interventionTransfer rate is limitedCPU is tied upDMA is the answer
19DMA Function Additional Module (hardware) on bus DMA controller takes over from CPU for I/O
21DMA Operation 1. CPU tells DMA controller: Request: Read or Write Device addressStarting location in memoryData transfer amount2. CPU carries on with other work3. DMA controller does transfer4. DMA controller sends interrupt
22DMA Transfer Cycle Stealing 1. DMA controller takes over bus for a cycle2. Transfer of one word of data3. Not an interruptCPU does not switch context4. CPU suspended just before it accesses busi.e. before an operand or data fetch or a data write5. Slows down CPU
23DMA and Interrupt Break points During an Instruction Cycle
24DMA Configurations(1) Single Bus, Detached DMA controller 1. Each transfer uses bus twiceI/O to DMA then DMA to memory2. CPU is suspended twice
25DMA Configurations (2) Single Bus, Integrated DMA controller Controller may support >1 deviceEach transfer uses bus onceDMA to memoryCPU is suspended once
26DMA Configurations (3) Separate I/O Bus Bus supports all DMA enabled devicesEach transfer uses bus onceDMA to memoryCPU is suspended once
27Intel 8237A DMA Controller Interfaces to 80x86 family and DRAM When DMA module needs buses it sends HOLD signal to processorCPU responds HLDA (hold acknowledge)DMA module can use busesE.g. transfer data from memory to disk
29Review QuestionsList three broad classifications of external , or peripheral , devices.What is the International Reference Alphabet?What are the major functions of an I/O module?List and briefly define three techniques for performing I/O.What is the difference between memory-mapped I/O and isolated I/O?When a device interrupt occurs , how does the processor determine which device issued the interrupt?When a DMA module takes control of a bus , and while it retains control of the bus , what does the processor do?