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Cryptanalysis on FPGA Based Hardware Malcolm Alda Sumantri Bachelors of Engineering (Software) & Bachelors of Commerce (Finance) The University of Sydney.

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Presentation on theme: "Cryptanalysis on FPGA Based Hardware Malcolm Alda Sumantri Bachelors of Engineering (Software) & Bachelors of Commerce (Finance) The University of Sydney."— Presentation transcript:

1 Cryptanalysis on FPGA Based Hardware Malcolm Alda Sumantri Bachelors of Engineering (Software) & Bachelors of Commerce (Finance) The University of Sydney Supervisors: Matt Barrie Craig Jin

2 Introduction Welcome to the Digital Age where everything can be replicated! Cryptography is used… –To protect our privacy For example: our real identity, our e-mails to family and friends, our digital photos, our work. –To protect corporate secrets For example: future corporate strategies, intellectual property, pricing information, human resources information. –By governments For example: sending messages to spies, task forces, between agencies to protect civilians and against terrorism. How secure are our currently deployed cryptosystems?

3 Motivation Information security is a resource game. –More funds means more access to information. The US National Security Agency’s annual budget is classified but is said to be over US $13 billion. Assessing the strength of our cryptosystems therefore involves determining the cost to break them. Rapid development in Field Programmable Gate Array Technology (FPGA) technology that makes it cheaper to develop high-performance custom hardware systems. FPGA technology has proven to be effective for cryptographic use. A recent optimization in cryptanalysis. –Rainbow Tables

4 Background Symmetric Cipher Cryptanalysis: Code breaking, reveal the plaintext without the key. –Exhaustive Key Search: Try every key possible, requires large computational power. –Table Lookup: Store keys and ciphertexts in a massive tables to perform a lookup when trying to attack, requires a large amount of memory (infeasible). –Time-memory trade-off: Give up memory to achieve a faster attack time. FPGAs –Reconfigurable logic (upload the bitstream to the hardware). –Cheaper than Application Specific Integrated Circuits (ASICs) for small volumes.

5 Time-Memory Trade-Off: Rainbow Tables How does it work? –Assume a chosen-plaintext attack scenario. The attacker can choose which plaintext to access. This attacker will use this to attack the cryptosystem. This is practical in the real-world (UNIX password hashing, “#include ”, “\n”) –Two Phases 1.Precomputation Phase 2.Online Attack Phase (Cryptanalytic Attack) Precomputation Phase: Generate a rainbow table. –A rainbow table is a two-column table (start-point, end-point) –These points are possible keys. –This table is generated by a specific algorithm. Online Attack Phase: Use the rainbow table. –We are given a ciphertext to break. –Now we perform a search on the rainbow table by using another algorithm This method is probabilistic, but faster than exhaustive key search. Unlike exhaustive key search that only requires computational resources (processor). This method uses memory as well as computational resources. As a result, the attack time is faster but we have given up memory. This is the trade-off.

6 Methodology Design and implement an FPGA based cryptanalytic system that uses the rainbow tables method of cryptanalysis. Use the Data Encryption Standard (DES) as the test symmetric cipher. –DES uses a 56-bit key. –DES is the most widely studied cipher. –DES is still used today (UNIX password hashing). Determine the cost to break DES. Extrapolate the cost to break other ciphers.

7 In designing a cryptanalytic system, the performance of the cipher module will determine the performance. Security of DES derives from 16 rounds of permutations, substitutions and xoring. Each round is implemented as a 3- stage pipeline. A total of 48-stages for the 16 rounds of DES. –Pipelining improves performance: Attain higher clock frequencies. Achieve parallelization: 48 encryptions per clock cycle. Design I – Data Encryption Standard

8 Design II – The Rainbow Table Precomputation System 1. High Level System Design2. Hardware Design 3. Hardware output behavior (Timing Diagram)

9 Design III – The Rainbow Table Online Attack System StepGoalToolInput to ToolOutput of Tool 1Generate end- points from the chosen plaintext/cipherte xt pair. End-Point Generator (Hardware) Chosen plaintext, chosen ciphertext, start mark, end-mask Prospective End- Point, Prospective Column Number 2Perform table lookup on all end-points generated from Step 1. Online Attack Software Application End-Points generated from Step 1. Start Points that corresponds with matching end-points from Step 1. 3Generate Key from Starting Points found in Step 2. Intermediate Key Generator (Hardware) Start-Point and matching column number (from Steps 1 and 2), start-mask, end-mask. Candidate Key(s) 4Test validity of Key Online Attack Software Application Candidate key(s) from Step 3, chosen plaintext, chosen ciphertext. Key 1. High Level System Design 2. Hardware Design3. Mechanism

10 Experiment and Results Experiment: –Cryptanalytic attack on 40-bit DES since the resources to break DES is out-of-reach for the budget in this thesis. –Use Sensory Networks TM NodalCore TM C-1000 PCI Card. Xilinx® Virtex-II Pro VP-40 FPGA Flexible chipset architecture to embed our hardware engines. PCI interface allows for high-speed communications. Results –40-bit DES Rainbow Table can be generated in less than 4 hours. Table parameters allows for 85% cryptanalytic success probability. Fastest known implementation in the literature based on results. –Online attack of 40-bit DES in 30.8 seconds.

11 Data Analysis Performance-Cost Analysis –Determine the FPGA chip that provides the highest performance for the lowest cost. –Synthesized the hardware designs for various Xilinx FPGAs. –Spartan 3 S-1500 provides the highest performance-cost relative to other Xilinx® FPGA chips. Extrapolate the design of a machine to break DES (56-bit key length) –Result: DES can be broken with 85% success probability in 72 minutes for an approximate cost of US $1,210. Performance-Cost of Precomputation Hardware System

12 Conclusion FPGAs provides a low cost and effective solution to cryptanalysis. Rainbow table attacks provide a faster attack time compared to brute-force, but brute-force uses less resources, that is, memory resources. –For large key sizes, the rainbow table attack becomes infeasible as memory costs is prohibitive. Potential Attacker Key Length (bits)Cost (US $) Clever Outsider 56353 581,413 605,650 Knowledgeable Insiders 6222,600 6490,400 Funded Organization (Large Corporation, Mafia) 66361,601 681.4 million Funded Organization (Small Government, Terrorist Networks) 7224 million 76370 million 781.5 billion Funded Organization (Large Government Bodies: US National Security Agency) 806 billion 8224.7 billion 8494.8 billion 86380 billion 881.5 trillion Not feasible 92242 trillion

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