1. C. Fernández Bedoya, A. Navarro, I. Redondo

2. C. Fernández Bedoya November 29th, 2011 2 Goal: Replace SC crate with simple CuOF electronics and place TSC (Trigger Sector Collector) and ROS (Read Out Server) in USC during LS1 Motivation: Reduce the critical electronics in UXC, minimizing single point of failures

3. C. Fernández Bedoya November 29th, 2011 3 Wiener crate LHC9U 12 U OFCu- ROS Input optical fibers From the back of the rack TIMBUS_OFCU backplane J2-OFCU backplane 1U to allow extraction of the modules

4. C. Fernández Bedoya November 29th, 2011 4 One Wiener crate purchased at Madrid to study the integration details Just arrived last week 3U VME backplane Power supply +5V/100A (should be higher current for TSC) * 4 first slots are 6U (for Linco) * Guides 2.4 mm wide * Rear transition modules mechanics * Extended fan tray for the RTM * 12U high to allow extraction of RTM

5. C. Fernández Bedoya November 29th, 2011 5 TIMBUS_OFCU backplane J2-OFCU backplane Allows distribution of the TTC signals and ROS-TSC link Allows Slow control to the rear transition modules through a standalone protocol Translates the Linco VME access to read the OFCU registers (No additional parts needed for the Slow control) Need to study the possible power distribution from the upper part of the crate (behind the PS) to the other backplanes Schematics basically finished, layout underway

6. C. Fernández Bedoya November 29th, 2011 6 ROS OFCu TSC 16 bit parallel data J3 FPGA TSC Deserializer J2 slow control -Pluggable OF receivers -Reusable for new ROS/TSC -12 channels 12 ch 25th ch TSC input Dual SFP receiver 25 channels/board -Schematics basically finished -First version of the firmware done -PCB Layout underway

7. C. Fernández Bedoya November 29th, 2011 7 TIMBUS_OFCU: It is very similar to present TIMBUS backplane (allows distribution of the TTC signals to the ROS and TSC) But TIMBUS also interconnects each pair of ROS-TSC for the debugging data, now that has been removed The power supply connection has also been modified (no Powerclaw) It also uses different VME_96 connectors press-fit type to allow the rear transition module to be connected on the back First prototype produced and being assembled at Ciemat

8. C. Fernández Bedoya November 29th, 2011 8

9. 9 LINCO VME_patch TIM ROS S1ROS S2ROS S3ROS S4ROS S5ROS S6ROS S7ROS S8ROS S9 ROS S10ROS S11ROS S12 New SC crate front view VME link to TIM, ROS Link to RTM through J2 * Connection from the OFCU-TSC on the top to the VME_patch * 4 I2C wires to the VME_patch for further VME reading * At present, we are still working on the definition of the VME_patch

10. C. Fernández Bedoya November 29th, 2011 10 12 U rear TSC Could be 3U? (to make the TSC crates 11 U instead of 12 U) Needs to be checked - Working on the definition of the rear-TSC - First version of the firmware done FPGA Optical transmitter OF

11. C. Fernández Bedoya November 29th, 2011 11

12. C. Fernández Bedoya November 29th, 2011 12 3 racks here for DT Upgrade being installed this YETS (Year End Technical Stop) DT-DSS being moved here. When? * SC temperature cables: we need to extend the cables and re-calibrate each probe (they have a cable compensation mechanism). * short commissioning (a couple of months) before restart operations A. Triossi I. Redondo A. Triossi I. Redondo

13. C. Fernández Bedoya November 29th, 2011 13 * BiWeekly meeting DT Upgrade phase 1. EVO or P5. THURSDAYS AT 11:00 Mail distribution list: cms-barrel-mu-upgr@cern.ch * Reminder of the TWIKI with all the information for the SC relocation: https://twiki.cern.ch/twiki/bin/view/CMS/DtUpgrade https://twiki.cern.ch/twiki/bin/view/CMS/DriftTubesElectronics