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CMPE 325 Computer Architecture II Cem Ergün Eastern Mediterranean University Multiplication & Division Algorithms

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Cem Ergun Multiplication & Division Algorithms 2 Binary Multiplication At each step we multiply the multiplicand by a single digit from the multiplier. –In binary, we multiply by either 1 or 0 (much simpler than decimal). Keep a running sum instead of storing and adding all the partial products at the end.

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Cem Ergun Multiplication & Division Algorithms 3 Multiplication Long-hand multiplication (12 × 9 = 108) = 12 ten (n bit Multiplicand) × = 9 ten (m bit Multiplier) = 108 ten (n + m bit Product) The result is a number that is n + m - 1 bits long

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Cem Ergun Multiplication & Division Algorithms 4 Implementing Multiplication Several different ways to implement Things to note about previous method –At each step we either copied or set the value to 0 –LSBs of the product don’t change once computed Can form product by shifting and adding Solution #1 –Shift multiplicand left at each step (same as adding 0’s) –Shift multiplier right so we can always consider the 0’th bit

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Cem Ergun Multiplication & Division Algorithms 5 Solution #1 Multiplication without sign (12 × 9 = 108) = 12 ten (n bit Multiplicand) × = 9 ten (m bit Multiplier) = 108 ten Multiplicand Multiplier Product

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Cem Ergun Multiplication & Division Algorithms 6 t 32nd repetition? Start Multiplier0 = 0Multiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions Solution #1: Operations

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Cem Ergun Multiplication & Division Algorithms 7 Solution #1: Example IterStepMultiplierMultiplicandProduct 0Initial Values Multiplier[0]=1 Prod+Mcand Shift multiplicand left Shift multiplier right Multiplier[0]=0 Do nothing Shift multiplicand left Shift multiplier right Multiplier[0]=0 Do nothing Shift multiplicand left Shift multiplier right Multiplier[0]=1 Prod+Mcand Shift multiplicand left Shift multiplier right

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Cem Ergun Multiplication & Division Algorithms 8 Solution #1: Hardware Product Multiplicand 64-bit ALU Shift Left Shift Right Write Control 32 bits 64 bits Multiplier Add

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Cem Ergun Multiplication & Division Algorithms 9 Adjustments to Algorithm 1 One big problem with the algorithm/implementation shown: –need a 64 bit ALU (adder). –Half of the multiplicand bits are always 0 Either high or low bits are 0, even as shifted –LSB of product never changes once set –Half of the 64 bit adder is therefore wasted We can fix this by: –Leaving the multiplicand alone (don’t shift). –Instead of shifting multiplicand left, shift the product right –Add multiplicand to left half of running sum. –Adder only needs to be 32 bits wide

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Cem Ergun Multiplication & Division Algorithms 10 Solution #2: Adjusted Algorithm Revised Addition Shift partial sum instead of multiplicand

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Cem Ergun Multiplication & Division Algorithms 11 Solution #2: Example IterStepMultiplierMultiplicandProduct 0Initial Values Multiplier[0]=1 Prod+Mcand Shift product right Shift multiplier right Multiplier[0]=0 Do nothing Shift product right Shift multiplier right Multiplier[0]=0 Do nothing Shift product right Shift multiplier right Multiplier[0]=1 Prod+Mcand Shift product right Shift multiplier right

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Cem Ergun Multiplication & Division Algorithms 12 Solution #2: Hardware Product Multiplicand 32-bit ALU Shift Right Write Control 32 bits 64 bits Multiplier Shift Right Upper 32 bits Add

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Cem Ergun Multiplication & Division Algorithms 13 Issues and Alternative In the implementation of the adjusted algorithm it is possible to save space by putting the multiplier in the rightmost 32 bits of the product register. –If you notice, half of the product register is useless at the beginning –At the end, the multiplier register becomes useless Solution #3 The algorithm is the same, but steps 2 and 3 are done at the same time. –Remove the multiplier register –Place the multiplier value in the lower half of the product register

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Cem Ergun Multiplication & Division Algorithms 14 Solution #3: Operations

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Cem Ergun Multiplication & Division Algorithms 15 Solution #3: Example IterStepMultiplicandProduct 0Initial Values Product[0]=1 Prod+Mcand Shift product right Product[0]=0 Do nothing Shift product right Product[0]=0 Do nothing Shift product right Product[0]=1 Prod+Mcand Shift product right

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Cem Ergun Multiplication & Division Algorithms 16 Solution #3: Hardware Product Multiplicand 32-bit ALU Control 32 bits 64 bits MultiplierUpper 32 bits Add Write Shift Right LSB

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Cem Ergun Multiplication & Division Algorithms 17 Signed Multiplication Previous algorithms work for unsigned. We could: –convert both multiplier and multiplicand to positive before starting, but remember the signs. –adjust the product to have the right sign (might need to negate the product). –Set the sign bit to make the number negative if the multiplicand and multiplier disagree in sign Positive × Positive = Positive Negative × Negative = Positive Positive × Negative = Negative Negative × Positive = Negative

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Cem Ergun Multiplication & Division Algorithms 18 Supporting Signed Integers We can adjust the previous algorithm to work with signed integers make sure each shift is an arithmetic shift –right shift – extend the sign bit (keep the MS bit the same instead of shifting in a 0). Since addition works for signed numbers, the multiply algorithm will now work for signed numbers.

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Cem Ergun Multiplication & Division Algorithms x 0011 (-2 x 3) StepMultiplicandProduct a 2, a 2, , , multiplier is rightmost 4 bits 1 st partial product in left 4 bits Shift Right Result is 2s complement

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Cem Ergun Multiplication & Division Algorithms 20 Signed Third Multiplication Algorithm

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Cem Ergun Multiplication & Division Algorithms 21 Improving the speed with Combinational Array Multiplier

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Cem Ergun Multiplication & Division Algorithms 22 Combinational Array Multiplier

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Cem Ergun Multiplication & Division Algorithms 23 Combinational Array Multiplier 3 bit Example

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Cem Ergun Multiplication & Division Algorithms 24 Booth’s Algorithm Requires that we can do an addition or a subtraction each iteration (not always an addition). Uses the following property –the value of any consecutive string of 1s in a binary number can be computed with one subtraction.

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Cem Ergun Multiplication & Division Algorithms 25 A different way to compute integer values (8-2=6) (256-8 = 248)

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Cem Ergun Multiplication & Division Algorithms 26 A little more complex example

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Cem Ergun Multiplication & Division Algorithms 27 An overview of Booth’s Algorithm When doing multiplication, strings of 0s in the multiplier require only shifting (no addition). When doing multiplication, strings of 1s in the multiplier require operation and shifting. We need to add or subtract only at positions in the multiplier where there is a transition from a 0 to a 1, or from a 1 to a 0.

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Cem Ergun Multiplication & Division Algorithms 28 Booth Explanation Booth also works for negative numbers Booth Algorithm –Add additional bit to the right of product –Use right two bits of product to determine action –Use arithmetic right shift () End of string Beginning of string Middle of string

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Cem Ergun Multiplication & Division Algorithms 29 Shifting The second step of the algorithm is the same as before: shift the product/multiplier right one bit. –Arithmetic shift needed for signed arithmetic. –The bit shifted off the right is saved and used by the next step 1 (which looks at 2 bits). Booth’s Algorithm

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Cem Ergun Multiplication & Division Algorithms 30 Booth Example IterStepMultiplicandProduct 0Initial Values Product=10 Prod-Mcand Shift product right Product=01 Prod+Mcand Shift product right Product=00 Do nothing Shift product right Product=10 Prod-Mcand Shift product right Consider the same example, but think of it as a signed multiplication (-4×-7=28)

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Cem Ergun Multiplication & Division Algorithms 31 Multiply in MIPS Product stored in two 32 bit registers called Hi and Low mult $s0, $s1# $s0 * $s1 high/low multu $s0, $s1# $s0 * $s1 unsigned Results are moved from Hi/Low mfhi $t0# $t0 = Hi mflo $t0# $t0 = Low Pseudoinstruction mul $t0, $s0, $s1# $t0 = $s0 * $s1

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Cem Ergun Multiplication & Division Algorithms 32 Divide Long-hand division (108 ÷ 12 = 9) (n bit Quotient) | (Divisor) | (Dividend) (Remainder) N + 1 Steps

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Cem Ergun Multiplication & Division Algorithms 33 Divide Solution #1 Solution #1 –Start with quotient = 0, remainder = dividend, and divisor’s top bits set –On each iteration set remainder to be remainder – divisor –If large enough (remainder 0), then shift quotient left and set rightmost to 1 –If not large enough (remainder < 0), then set remainder to remainder + divisor (restore) –Shift divisor right –Continue for n+1 (33) iterations rem = rem - div if rem < 0 then // divisor too big rem = rem + div quo <<= 1 LSB(quo) = 0 else // can divide quo <<= 1 LSB(quo) = 1 fi div >>= 1 repeat unless done

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Cem Ergun Multiplication & Division Algorithms 34 Divide Solution #1

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Cem Ergun Multiplication & Division Algorithms 35 Solution #1: Hardware Remainder Divisor 64-bit ALU Shift Right Shift Left Write Control 32 bits 64 bits Quotient MSB

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Cem Ergun Multiplication & Division Algorithms 36

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Cem Ergun Multiplication & Division Algorithms / 0010 StepQuotientDivisorRemainder b b a a a initial values after subtraction after restore shift right final remainder final quotient

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Cem Ergun Multiplication & Division Algorithms 38 Division Example: /0101 Control 64-bit Remainder 64 bit Write Divisor 64 bit ShRight Quotient 32 bit ShLeft QuotientDivisorRemainder xxxx xxxx xxx Initial Values (Divisor in LHS) 1a. Rem. <-- Rem-Divisor xxx a. Rem. <-- Rem-Divisor - xx xx a. Rem. <-- Rem-Divisor - x x a. Rem. <-- Rem-Divisor a. Rem. <-- Rem-Divisor - - 1b. Rem.<0, Add Div., LSh Q, Q 0 =0; RSh Div. 2b. Rem>=0, LSh Q, Q 0 =1; RSh Div. 3b. Rem>=0, LSh Q, Q 0 =1; RSh Div. 4b. Rem>=0, LSh Q, Q 0 =1; RSh Div. 5b. Rem<0, Add Div., LSh Q, Q 0 =0; RSh Div /0101 = 1110 rem /5 = 14 rem N+1 Steps, but first step cannot produce a 1.

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Cem Ergun Multiplication & Division Algorithms 39 Issues and Alternative Just as before –Half of the divisor bits are always 0 Either high or low bits are 0, even as shifted –Half of the 64 bit adder is therefore wasted Solution #2 –Instead of shifting divisor right, shift the remainder left –Adder only needs to be 32 bits wide –Can also remove iteration by switching order to shift and then subtract –Remainder is in left half of register

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Cem Ergun Multiplication & Division Algorithms 40 Solution #2: Hardware Remainder Divisor 32-bit ALU Shift Left Control 32 bits 64 bits Quotient Write Shift Left MSB

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Cem Ergun Multiplication & Division Algorithms 41 xxxx x Improved Divider: /0101 QuotientDivisorRemainder xxxx xxx xx Initial Values 0. LSh Rem xxx xx 1a. Rem. <-- Rem-Divisor - xx xxx xx xxx 2a. Rem. <-- Rem-Divisor - x xxxx x xxxx xxxx 3a. Rem. <-- Rem-Divisor 4a. Rem. <-- Rem-Divisor - 1b. Rem>=0, LSh Q, Q 0 =1; LSh Rem. 2b. Rem>=0, LSh Q, Q 0 =1; LSh Rem. 3b. Rem>=0, LSh Q, Q 0 =1; LSh Rem. 4b. Rem<0, Add Div., LSh Q, Q 0 = /0101 = 1110 rem /5 = 14 rem xxxx x Control 32-bit LH Rem. 64 bit Write Divisor 32 bit Quotient 32 bit ShLeft RH Rem.

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Cem Ergun Multiplication & Division Algorithms 42 Issues and Alternative Just as before, half of the remainder register is useless at the beginning At the end, the quotient register becomes useless Solution #3 –Remove the quotient register –Place the quotient in the lower half of the remainder register –Need to unshift in the last step to account for off-by-one

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Cem Ergun Multiplication & Division Algorithms 43 Further Modifications Solution#3 Same space savings as with multiplication: –use right ½ of remainder register to hold the quotient.

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Cem Ergun Multiplication & Division Algorithms 44 ft half of the Remainder register Remainder 0 1. Shift the Remainder register left 1 bit – > Divide Solution #3 rem <<= 1 rem -= (div >> 32) if rem < 0 then rem += (div >> 32) rem <<= 1 LSB(rem) = 0 else rem <<= 1 LSB(rem) = 1 fi repeat unless done Correct remainder

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Cem Ergun Multiplication & Division Algorithms 45 Solution #3: Example

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Cem Ergun Multiplication & Division Algorithms Improved Improved Divider: /0101 DivisorRemainder-Quotient Initial Values 0. LSh Rem-Quo. 1a. Rem <-- Rem-Divisor a. Rem. <-- Rem-Divisor a. Rem. <-- Rem-Divisor 4a. Rem. <-- Rem-Divisor - 1b. Rem>=0, LSh Rem-Quo, Q 0 =1 2b. Rem>=0, LSh Rem-Quo, Q 0 =1 3b. Rem>=0, LSh Rem-Quo, Q 0 =1 4b. Rem<0, Add Div., LSh Rem-Quo, Q 0 = /0101 = 1110 rem /5 = 14 rem Control 32-bit LH Rem. 64 bit Write Divisor 32 bit ShLeft Rem-Quot Final: RSh Rem 1

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Cem Ergun Multiplication & Division Algorithms 47 Signed Division Same process as naïve integer multiply –Make divisor and dividend positive –Negate quotient if signs of divisor and dividend disagree Set sign of remainder –Dividend = Quotient × Divisor + Remainder –Sign should match dividend

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Cem Ergun Multiplication & Division Algorithms 48 Divide in MIPS Quotient/Remainder stored in two 32 bit registers called Hi and Low div $s0, $s1# $s0 / $s1 high/low divu $s0, $s1# $s0 / $s1 unsigned Results are moved from Hi/Low mfhi $t0# $t0 = Hi mflo $t0# $t0 = Low Pseudoinstructions div $t0, $s0, $s1# $t0 = $s0 / $s1 rem $t0, $s0, $s1# $t0 = $s0 % $s1 div $s0,$s1 Lo = $s0/$s1 (integer) Hi = $s0 % $s1

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