Additional Functionality Need to add the idea of sequential logic to the design with a clock. PIC instructions are executed on a single clock cycle, this includes: 1) Performing the operation 2) Storing the result Lab 1 only performed the operation – need to store result from R output of ALU into the appropriate register (either W or in the register file RF) before the next program instruction clock cycle. Must decode destination address to determine appropriate storage location Use the current instruction set from Lab 1 with additional functionality to execute a cycle accurate PIC program out of Instruction Memory.
Additional Functionality Cont. Three additional functions – related to moving and storing registers: 1) MOVLW – Move Literal to Working Register (W) 12 bit Opcode: “1100 kkkk kkkk”, where “kkkkkkkk” is the value to write to the W Register. 2) MOVWF – Move W to one of the Memory Registers (MR) in the Register File 12 bit Opcode: “0000 001f ffff”, where “fffff” is the address of the register to write to. 3) MOVF – Move from MR to W 12 bit Opcode: “0010 00df ffff”, where “fffff” is the address of the register whose contents are to be written to W, IF d is ‘0’. The d = ‘1’ case will not be used.
ALU W R0 R1 R2. R31 Register File Clock dest addr Dest Decode 8 8 Load_W_en Load_R_en[31:0] R ? 8 RF W Current instruction ROM Program Sequencer Addr In Dout Clock Lab 2 Block Diagram
Bonus: BILBO Implementation (Built In Logic Block Observer) Implement registers as BILBOs with added abilities: BILBO Block Diagram Offers four separate functionalities, depending on the values of (B1,B2): 1) Serial Scan Mode (0,0) 2) Pattern Generator (0,1) 3) Normal Mode (1,0) 4) MISR – Multiple Input Signature Register (1,1)
Example BILBO Usage SI – Scan In SO – Scan Out Characteristic polynomial: 1 + x + … + x n CUTs A and C: BILBO1 is MISR, BILBO2 is LFSR CUT B: BILBO1 is LFSR, BILBO2 is MISR
BILBO Serial Scan Mode B1 B2 = “00” Dark lines show enabled data paths