Presentation on theme: "Machine Instructions Operations 1 ITCS 3181 Logic and Computer Systems 2015 B. Wilkinson Slides4-1A.ppt Modification date: March 18, 2015."— Presentation transcript:
Machine Instructions Operations 1 ITCS 3181 Logic and Computer Systems 2015 B. Wilkinson Slides4-1A.ppt Modification date: March 18, 2015
2 Instructions We will use a simple instruction formats of a so-called reduced instruction set computer (RISC), which has the characteristics: Simple, fixed length instruction format A few addressing modes Limited number of operations Designed to achieve high speed of execution It was recognized in the 1980’s that such processors would actually execute programs faster that the prevalent CISCs (complex instruction set computers).
3 Instruction format Our instruction format is quite similar to the G4/G5 PowerPC and SUN Sparc processors and also similar but not identical to that used in the assembly language simulator in the labs. Intel 64/IA32 processor family -- uses a very complex and archaic instruction format, based upon the early 8086 processor (which was themselves loosely based upon even earlier Intel processors). However Intel processors now convert this complex instruction format (CISC) internally to simpler RISC formats for performance reasons.
4 1.Thirty-two 32-bit integer registers called R0 to R31 2. One register, R0, holds zero permanently 3 All arithmetic done only between registers: - Three-register format op-code, destination register, source register 1, source register 2 or - Immediate addressing op-code destination register, source register, constant 4. Memory operations limited to: load register, and store register using register indirect addressing plus offset only: LD/LB destination register, offset[source register] ST/SB source register, offset[source register] Some Key Features of Processor Used R0 R1 R2 R31 R30 R3 R29 R4 R … 0000 R31 holds return address for procedures. R29 is a stack pointer see later.
5 Data Transfer Instructions that copy the contents of one location to another location. Examples MOV R1,R2;R1 = R2 LD R3,100[R2];Contents of memory whose address is ;given by R2 copied to R3. ST [R5],R4;Contents of R4 copied to memory loc. ;whose address held in R5. (Offset = 0) Note LD and ST cause 32-bit transfers. Use LB and SB to cause 8-bit transfers. InstructionComments
6 Arithmetic Instructions Performs an arithmetic operation such as addition, subtraction, multiplication or division. Examples ADD R1,R2,R3;R1 = R2 + R3 SUB R5,R4,3;R5 = R4 – 3 For literals (immediate addressing) differences in assembly language notation. Might be written as: SUB R5,R4,#3;R5 = R4 - 3 or SBI R5,R4,3;R5 = R4 - 3 depending upon assembly language.
7 Logical Instructions Performs bit-wise logical operation such as AND, OR, exclusive- OR, or NOT. AND, OR, exclusive-OR operate upon pairs of bits of two operands. Bit-wise AND, OR, Ex-OR, and NOT are available in C and Java (although you probably did not come across them!): C/Java Language Examples y = y & 1;bit-wise AND y with the number 1 z = z | 2;bit-wise OR z with the number 2
8 Machine Instruction Examples AND R1,R2,R3;R1 = R2 “AND” R3 if R2 = R3 = then R1 = OR R1,R2,R3;R1 = R2 “OR” R3 if R2 = R3 = then R1 =
9 Shift Instructions Moves the bits of a location one or more places left or right. Again available in C/Java (although you probably did not come across them!): C/Java language Examples y = y << 1;shift y 1 place left 1 z = z >> 2;shift z 2 places right
10 Machine Instruction Examples Examples SHL R1,R1,1;Shift R1 left one place SHR R1,R1,1;Shift R1 right one place X = 0 or 1 see next slide
11 Arithmetical and Logical Shifts Two types of shift usually provided: “Logical” shift (SHL, SHR) Fill free end with 0, i.e. X = 0. “Arithmetic” shift (SAL, SAR) Arithmetic shifts multiple/divide by 2. Arithmetic shift right maintains value of sign bit, i.e. X = value of original sign bit.
12 Example Starting with a number Shift arithmetic left one place. Get Shift arithmetic right two places. Get i.e. lost the 0.5.
13 Note: Java has logical shift right - called unsigned right shift, >>>. Example x = x >>> 2;
14 Question What is the difference, if any, between arithmetic shift left and logical shift left, i.e. what is the difference, if any, between: SHL R1, R1, 1 and SAL R1, R1, 1 Answer Arithmetic shift left same as logical shift left (except arithmetic overflow may be detected).
15 Question What is the effect of the sequence? SAR R1, R1, 1 SAL R1, R1, 1 Answer Makes number even if odd, i.e. 5 would become 4
16 Rotate Instructions Moves bits of location one or more places left of right in a circular fashion. Examples ROL R1,R1,1;Rotate R1 left one place ROR R1,R1,1;Rotate R1 right one place Version of rotate exists where the rotate passes thro a Carry flag within the condition code register, see later about the CCR