Presentation is loading. Please wait.

Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes.

Presentation on theme: "Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes."— Presentation transcript:

Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes

MSI (Medium Scale Integration) Circuits (chips)
MSI chips have complete circuits, built from multiple gates, on a single chip. Two classes of such integrated chips (ICs) are: Encoders and Decoders Multiplexers and Demultiplexers Are designed and based on binary coded input.

simple binary codes 2–bit codes: 3–bit codes:

10 key numeric keypad data encoded into 4-bit binary code.
Encoders Encoders typically have 2N inputs and N outputs. These are called 2N–to–N encoders. Typical examples include 4–to–2 encoders (probably not used much) 8–to–3 encoders 16–to–4 encoders It is assumed that only one input at a time is active. 10 key numeric keypad data encoded into 4-bit binary code. Due to the decimal arithmetic, we also have 10–to–4 encoders. (Why not 10:3?)

Exercise Write the truth table for the 10:4 decimal keypad encoder and boolean expressions of each output. Draw the circuit diagram. The Circuit Diagram for the 10–4 Encoder Input (10 bits) code Output code D9 through  D0 Y3 Y2 Y1 Y0 1 In the above encoder, one should note that the input D0 is not connected to any output. An output of 0000 always implies that button 0 is pushed. Y3 = D8 + D9, Y2=… , Y1=… , Y0=…

Decoders Decoders are the opposite of encoders; they are N–to–2N devices. Typical examples include 2–to–4 decoders 3–to–8 decoders 4–to–16 decoders optionally, they may have an enable line active-high or active-low (the selected output goes to logic 0) used for to convert n bit binary information to 2n unique outputs

2-to-4 Decoder

74LS138 (3-to-8 active-low decoder)

Exercise Define the equations for each output of the previous given 3:8 decoder IC (74LS138) truth table. Draw a circuit for equations of the outputs.

74LS139 (2-to-4 duo-decoder IC)

BCD-to-7 Segment Display Decoder

Decoder for 7-segment display

Multiplexer RS D-Type Serial Port Data Multiplexer

A 2-input multiplexer Quadruple 2-Line To 1-Line Data Selectors/Multiplexers Definition: An n-input multiplexer (called a MUX) is an n-way digital switch that switches/directs/routes one of ‘n’ inputs to the output line. controlled by the control lines ‘S’ to select which input line to be “connected” to the output. means that the logical value of the output will be the same as the logical value of the selected input.

4:1Mux Fout= I3S0’S1’ + ……

Exercise The logic circuit above is a design of 4 to 1 multiplexer with strobe input using NAND gates. Show the truth table for the mux and write the expression of the output Y.

Exercise Here we see an 8:1 multiplexer made of two 4:1 and one 2:1 multiplexer. Try to design a 4:1 mux using three 2:1 muxes? CD74ACT151: 8-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXER

Figure for 16:4 multiplexer
(or Quad 4:1 mux)

Exercise Define the function (job) of the logic design shown in figure?

Demultiplexer 74HCT238 3-to-8 line decoder/demultiplexer

Download ppt "Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes."

Similar presentations

Ads by Google