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1 Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes.

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Presentation on theme: "1 Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes."— Presentation transcript:

1 1 Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes

2 2 MSI (Medium Scale Integration) Circuits (chips) MSI chips have complete circuits, built from multiple gates, on a single chip. Two classes of such integrated chips (ICs) are: Encoders and Decoders Multiplexers and Demultiplexers Are designed and based on binary coded input.

3 3 simple binary codes 2–bit codes:3–bit codes:

4 4 Encoders typically have 2 N inputs and N outputs. These are called 2 N –to–N encoders. Typical examples include 4–to–2 encoders (probably not used much) 8–to–3 encoders 16–to–4 encoders It is assumed that only one input at a time is active. Encoders 10 key numeric keypad data encoded into 4-bit binary code. Due to the decimal arithmetic, we also have 10–to–4 encoders. (Why not 10:3?)

5 5 Input (10 bits) codeOutput code D9 through  D0Y3Y2Y1Y Y3 = D8 + D9, Y2=…, Y1=…, Y0=… Exercise Write the truth table for the 10:4 decimal keypad encoder and boolean expressions of each output. Draw the circuit diagram. The Circuit Diagram for the 10–4 Encoder

6 6 Decoders Decoders are the opposite of encoders; they are N–to–2N devices. Typical examples include 2–to–4 decoders 3–to–8 decoders 4–to–16 decoders optionally, they may have an enable line active-high or active-low (the selected output goes to logic 0) used for to convert n bit binary information to 2 n unique outputs

7 7 2-to-4 Decoder

8 8 74LS138 (3-to-8 active-low decoder)

9 9 Exercise Define the equations for each output of the previous given 3:8 decoder IC (74LS138) truth table. Draw a circuit for equations of the outputs.

10 10 74LS139 (2-to-4 duo-decoder IC)

11 11 BCD-to-7 Segment Display Decoder

12 12 Decoder for 7-segment display

13 13 RS D-Type Serial Port Data Multiplexer Multiplexer

14 14 A 2-input multiplexer Definition: An n-input multiplexer (called a MUX) is an n-way digital switch that switches/directs/routes one of ‘n’ inputs to the output line. controlled by the control lines ‘S’ to select which input line to be “connected” to the output. means that the logical value of the output will be the same as the logical value of the selected input. Quadruple 2-Line To 1-Line Data Selectors/Multiplexers

15 15 4:1Mux Fout= I 3 S 0 ’S 1 ’ + ……

16 16 Exercise The logic circuit above is a design of 4 to 1 multiplexer with strobe input using NAND gates. Show the truth table for the mux and write the expression of the output Y.

17 17 Exercise Here we see an 8:1 multiplexer made of two 4:1 and one 2:1 multiplexer. Try to design a 4:1 mux using three 2:1 muxes? CD74ACT151: 8-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXER

18 18 Figure for 16:4 multiplexer (or Quad 4:1 mux)

19 19 Exercise Define the function (job) of the logic design shown in figure?

20 20 74HCT238 3-to-8 line decoder/demultiplexer Demultiplexer

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